From mboxrd@z Thu Jan 1 00:00:00 1970 From: tobias@gambas-buch.de (Tobias Boege) Date: Sat, 8 Dec 2012 16:58:50 +0100 Subject: Speed Analysis Util. In-Reply-To: References: Message-ID: <20121208155850.GD543@aurora> To: kernelnewbies@lists.kernelnewbies.org List-Id: kernelnewbies.lists.kernelnewbies.org On Sat, 08 Dec 2012, Gustavo da Silva wrote: > Hello Kernel Brothers!! How are you??? > > So, I would like test the performance of my notebook, developing one or two > utilities, and have a better > mensurement about the speed. > > But it can help all of us. > > 1st: I would like mensure the speed making a counter (exacly bogomips? may > be). Loop+counter during 1 tickrate. > 2nd: The most interesting: How many memory cells in ram can we > access during 1tickrate? How could we develop this?! > > Both utils may run in long mode (64bits). Well, in real mode too; so, we > can compare the speed in the two modes! > > Some one knows how to develop a very small program/routine about that?! > > For the 2nd situation, a simple idea wrote in codesnipet form (consider the > intention, not the sintax! there are bugs! I know. Intel syntax.) Obviously! ;-) > > dw the_counter_cell 0 > lea bx, the_counter_cell > xor bx,bx > label: > inc [bx] # Could not be so simple like this, because the address can > be cached. Right? > loop label # breaked by an interruption. Just to express the intention. > > How could we create a small code for the 2nd situation, tring to force the > processor to not use the cache? As Drepper says[0], use the movntq instruction on x86_64 to bypass the cache. Regards, Tobi [0] http://www.akkadia.org/drepper/cpumemory.pdf p. 47ff.