From: chekuriravishankar@gmail.com (SHANKARCHEKURI)
To: kernelnewbies@lists.kernelnewbies.org
Subject: PCI express, link down problem..
Date: Thu, 24 Feb 2011 20:15:36 -0800 (PST) [thread overview]
Message-ID: <31010155.post@talk.nabble.com> (raw)
We have designed a SBC with MPC8548 PCIe 4x lanes connected with IDT PCIe
swicth.My POR of processor is showing the correct configuration as 4x with
2.5Gbps,RC mode.But when i read the PCIe LTSSM register it shows lane is in
Detect.quiet.when i probed the actual signals Processor side -Tx
diff.voltage of one lane(Lane 0) shows 700mv pp and it is reaching the
Rx.Remaining all other lane voltages are 0mv.Similarly,Receiver side
-TX,only one lane diff.voltage is showing 112mv pp,remainig all other lanes
are showing 0mv.what is the expected voltage levels?.The negotiated link
width is showing 1x.Is it due to the same reason?what could be reason for
the detect.quiet state?
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reply other threads:[~2011-02-25 4:15 UTC|newest]
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