From mboxrd@z Thu Jan 1 00:00:00 1970 From: bill4carson@gmail.com (bill4carson) Date: Tue, 31 Jul 2012 15:13:37 +0800 Subject: arm L_PTE_XXX entry addition for Debugging purpose In-Reply-To: References: Message-ID: <501785A1.6090806@gmail.com> To: kernelnewbies@lists.kernelnewbies.org List-Id: kernelnewbies.lists.kernelnewbies.org On 2012?07?30? 17:39, Dhyan wrote: > Dear All, > > From linux(2.6.35) arm page table architecture i can see we have one > hardware page table and there is corresponding Linux page table Entry > (L_PTE_*).The "Linux" PTE definitions are as like below from > arch/arm/include/asm/pgtable.h. > > |#define L_PTE_PRESENT (1<< 0) > #define L_PTE_FILE (1<< 1) > #define L_PTE_YOUNG (1<< 1) > #define L_PTE_BUFFERABLE(1<< 2) > #define L_PTE_CACHEABLE (1<< 3) > #define L_PTE_USER (1<< 4) > #define L_PTE_WRITE (1<< 5) > #define L_PTE_EXEC (1<< 6) > #define L_PTE_DIRTY (1<< 7) > #define L_PTE_COHERENT (1<< 9) > #define L_PTE_SHARED (1<< 10) > | > > So is it possible to add one more #|define L_PTE_DEBUG (1 << 11)| for my > debugging purpose (basically to trap all the write to that page and set > this bit when write happens and clear it off in another thread )? Or > is there any limitation like we can use only L_PTE till 10th bit ? > No such limitation on bit 11, so you can use define L_PTE_DEBUG (1 << 11) However I don't follow why you want to do so? > So could you please help > > -- > > Thanks & Regards > > Dhayn > > > > _______________________________________________ > Kernelnewbies mailing list > Kernelnewbies at kernelnewbies.org > http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies -- Love each day! --bill