From: lotabout@gmail.com (Mark Wallace)
To: kernelnewbies@lists.kernelnewbies.org
Subject: Physical address of Page Table Entries
Date: Sat, 09 Nov 2013 10:30:03 +0800 [thread overview]
Message-ID: <527D9E2B.2010208@gmail.com> (raw)
In-Reply-To: <4E5779AD88B2F040B8A7E83ECF544D1A05B606@SJCPEX01CL02.citrite.net>
Thanks Jeff. Solved my problem.
Below is my further investigation to support Jeff's idea.
The size of a Page Table (not a single entry) at any level is exactly 1
page.
2 level: 10+10+12. linear address will assign 10 bits for Page Directory
and 10 bits for Page Table, and thus each Page Table will have 2^10=1K
entries, and each entry has 4 Bytes. That's 4K in total, the same to the
size of one page.
3 level for ia64: the paging mechanism is 9+9+9+12. Each level will have
2^9=512 entries. and 8 Bytes for each entry. Thus take up 512*8=4K in
total. Again is the size of one page.
On 11/09/2013 09:56 AM, Jeff Haran wrote:
> I believe the directory entries are all exactly 1 page and page aligned. The number of bits of address space each level covers is derived from this and the size of each page table entry which has to be big enough to contain whatever the physical address size is on the CPU. Take a look at the various definitions of PGDIR_SHIFT and PAGE_SHIFT in the various arch directories. Page tables on 32 bit machines can contain 1K 32 bit entries (4KB) but on 64 bit machines they only contain 512 64 bit entries (still 4KB).
>
> Jeff Haran
>
> From: kernelnewbies-bounces at kernelnewbies.org [mailto:kernelnewbies-bounces at kernelnewbies.org] On Behalf Of Mark Wallace
> Sent: Friday, November 08, 2013 5:38 PM
> To: kernelnewbies at kernelnewbies.org
> Subject: Physical address of Page Table Entries
>
> Hi all,
>
> Question:
> When we use 2 level paging(Directory+Table+Offset), does the page table entries have to be put exactly on the beginning of a page frame?
>
> Description:
> The format of Page Directory and Page Table are the same. And they all contain 20 bits as a pointer to the next level entries.
>
> For Page Table entry, I understand that 20 bits is enough because page frames are 4k aligned. But for Page Directory entry, the 20 bits should be the address of a Page Table, that means the physical address of a Page Table entry should be 4k aligned too. And thus they may only exist at the beginning of a page frame.
>
> Is this right or am I missing something?
>
> Thanks.
prev parent reply other threads:[~2013-11-09 2:30 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-09 1:37 Physical address of Page Table Entries Mark Wallace
[not found] ` <4E5779AD88B2F040B8A7E83ECF544D1A05B606@SJCPEX01CL02.citrite.net>
2013-11-09 2:30 ` Mark Wallace [this message]
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