FPGA registers userspace interface?

[daniel.baluta@gmail.com (Daniel Baluta)]

> I thought about using 3 files in sysfs.
> 1. address of the register
> 2. data to write to the register
> 3. trigger that do the write

The most effective solution would be to
have one file per register.

Writing register:
# echo value > /sys/path/to/file

Reading register:
# cat /sys/path/to/file

Also, since your FPGA is in development phase I assume that
the registers base address is changing (or am I wrong?). You can
solve this with an additional writable sysfs entry  which will
hold the current base address.

thanks,
Daniel.