From mboxrd@z Thu Jan 1 00:00:00 1970 From: daniel.baluta@gmail.com (Daniel Baluta) Date: Mon, 3 Jan 2011 22:52:34 +0200 Subject: FPGA registers userspace interface? In-Reply-To: References: <4D21C86E.6060503@pjd.me.uk> Message-ID: To: kernelnewbies@lists.kernelnewbies.org List-Id: kernelnewbies.lists.kernelnewbies.org > I thought about using 3 files in sysfs. > 1. address of the register > 2. data to write to the register > 3. trigger that do the write The most effective solution would be to have one file per register. Writing register: # echo value > /sys/path/to/file Reading register: # cat /sys/path/to/file Also, since your FPGA is in development phase I assume that the registers base address is changing (or am I wrong?). You can solve this with an additional writable sysfs entry which will hold the current base address. thanks, Daniel.