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From: gprabhunath@gmail.com (Prabhu nath)
To: kernelnewbies@lists.kernelnewbies.org
Subject: Basic HighMeM Question
Date: Mon, 27 Jun 2011 16:45:18 +0530	[thread overview]
Message-ID: <BANLkTim4i2Ar+eGyYOBQaMtvCKcwCWb5Pw@mail.gmail.com> (raw)
In-Reply-To: <BANLkTinp6_n0z6OAzo1R6sq_nLynyo_3Xg@mail.gmail.com>

On Mon, Jun 27, 2011 at 3:58 PM, Paraneetharan Chandrasekaran <
paraneetharanc@gmail.com> wrote:

>
>
> On 27 June 2011 14:58, Prabhu nath <gprabhunath@gmail.com> wrote:
>
>> Please see inline.
>>
>> On Mon, Jun 27, 2011 at 2:42 PM, piyush moghe <pmkernel@gmail.com> wrote:
>>
>>> I have very basic some question's related to HighMem Memory Mapping:
>>>
>>> 1) Why can't we directly map memory in highmemory?
>>>
>>         This question is incorrect ? Typically on a intel architecture,
>> the physical address space is divided into LOWMEM and HIGHMEM region. Lower
>> 896 MB is marked as LOWMEM region and >896MB as HIGHMEM. More likely in the
>> intel architecture the memory is always decoded from 0x00000000. For Eg. If
>> you have memory of 1GB, then 896MB is decoded to LOWMEM and the rest is
>> decoded in HIGHMEM.
>>
>>>
>>> 2) As documents at many places why is the limit of 896MB for ZONE_NORMAL?
>>>
>>         Since this 896 MB of physical address space is directly mapped to
>> the Kernel linear virtual address space i.e from (0xC0000000 to 0xF8000000).
>> Also, there is a Fixed constant offset relation between VA to PA i.e. VA =
>> PA + 0xC000000. This has been done to avoid any page table walk for
>> translating kernel virtual address to physical address.
>> Thus when kernel virtual address is generated for execution, PA is
>> calculated by MMU directly, thus making kernel code execution faster.
>>
>
> Does this mean MMU doesnt look into TLB or pagetable when the kernel
> virtual address is referenced? how does the MMU know the range of direct
> mapping ( i.e offset-ed mapping)?
>
       Ideally yes, MMU should hold the range information. I do not know
about Intel architecture but I have learnt that in PowerPC architecture
there is a BAT register which will hold the offset information.
      Any comments ?

>
>> All the above explaination strictly holds good for Intel architecture on
>> Desktop machines.
>>
>> Regards,
>> Prabhunath
>>
>>>
>>>
>>> Regards,
>>> Piyush
>>>
>>> _______________________________________________
>>> Kernelnewbies mailing list
>>> Kernelnewbies at kernelnewbies.org
>>> http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
>>>
>>>
>>
>> _______________________________________________
>> Kernelnewbies mailing list
>> Kernelnewbies at kernelnewbies.org
>> http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
>>
>>
>
>
> --
> Regards,
> Paraneetharan C
>
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  parent reply	other threads:[~2011-06-27 11:15 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-06-27  9:12 Basic HighMeM Question piyush moghe
2011-06-27  9:28 ` Prabhu nath
     [not found]   ` <BANLkTinp6_n0z6OAzo1R6sq_nLynyo_3Xg@mail.gmail.com>
2011-06-27 11:15     ` Prabhu nath [this message]
2011-06-28  5:51       ` piyush moghe
2011-06-28 10:16         ` Mulyadi Santosa
2011-06-28 10:49           ` Prabhu nath
2011-06-28 15:26             ` Mulyadi Santosa
2011-06-29  6:30               ` piyush moghe
2011-06-29  6:38                 ` Mulyadi Santosa
2011-06-29  7:34                   ` Paraneetharan Chandrasekaran
2011-06-29  9:03                     ` Mulyadi Santosa

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