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From: coolsandyforyou@gmail.com (sandeep kumar)
To: kernelnewbies@lists.kernelnewbies.org
Subject: How DMA transfers > 2MB are being performed?
Date: Wed, 1 Jun 2011 10:40:55 +0530	[thread overview]
Message-ID: <BANLkTimEyoDGdLT+_fOOiWSqdSZ1BhYOOQ@mail.gmail.com> (raw)

Hi all
A very limited (1-2MB) address space is mapped to dma_alloc() in ARM
architecture..what if a DMA transfer of >2MB is needed at a time? As DMA
transfer starts asynchronously..CPU relinquishes data buses..so CPU cant
control. So the excess data which is >2MB will be overflown or lost..So how
this large data transfers are being managed?

-- 
With regards,
Sandeep Kumar Anantapalli,
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             reply	other threads:[~2011-06-01  5:10 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-06-01  5:10 sandeep kumar [this message]
2011-06-01  6:00 ` How DMA transfers > 2MB are being performed? Dave Hylands

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