From: htmldeveloper@gmail.com (Peter Teoh)
To: kernelnewbies@lists.kernelnewbies.org
Subject: Self modifying code in ARM 11 architectures
Date: Thu, 26 May 2011 10:53:27 +0800 [thread overview]
Message-ID: <BANLkTinD478kp=E8et+ZGXrgK-Wzx6F+YQ@mail.gmail.com> (raw)
In-Reply-To: <BANLkTimx0TThB3i6Yf0jZqAg97QJ1T+_Pg@mail.gmail.com>
On Thu, May 26, 2011 at 12:28 AM, Peter Teoh <htmldeveloper@gmail.com> wrote:
>
>
> On Tue, May 24, 2011 at 6:15 PM, Ashok Babu <ashok3d@gmail.com> wrote:
>>
>> Hi All,
>> I am no success in booting up the ARM1176 processor with the linux-2.6.32
>> kernel.
>> While googling about the ARM?Harvard?architecture, I came to know that we
>> have to flush/invalidate the D-Cache and I-Cache
>> when using the self modifying codes.
>> So here my questions/doubts :
>> 1) Is'nt it the kernel itself is self modifying code with lots of function
>> pointers ?
>> ? ? If yes, how is synchronization b/w d-cache and i-cache handled in the
>> kernel ?
>> 2) Can this be the reason for the kernel not booting for me ?
>> ? ? Because If i disable the I-Cache in the config, then the kernel boots
>> up without any issues.
>> Any pointers on this will be of great help.
>
> Here:
> http://blogs.arm.com/software-enablement/141-caches-and-self-modifying-code/
Based on the URL above (where it described to disable I cache to
execute self-modified codes), and your observation in (2), I guessed
that the behavior is correct. During bootup, linux kernel actually
unzip itself, and execute into the unzipped image. And so during
this time, the I-cache have to be disabled in order to bring the
instruction in from the external memory.
prev parent reply other threads:[~2011-05-26 2:53 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-24 10:15 Self modifying code in ARM 11 architectures Ashok Babu
2011-05-25 3:55 ` Mulyadi Santosa
2011-05-25 15:18 ` Michael Blizek
2011-05-25 15:55 ` Mulyadi Santosa
2011-05-25 16:28 ` Peter Teoh
2011-05-26 2:53 ` Peter Teoh [this message]
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