From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Date: Sat, 14 Dec 2019 13:27:34 +0100 From: Borislav Petkov Subject: Re: [PATCH v5 0/5] Append new variables to vmcoreinfo (TCR_EL1.T1SZ for arm64 and MAX_PHYSMEM_BITS for all archs) Message-ID: <20191214122734.GC28635@zn.tnic> References: <1574972621-25750-1-git-send-email-bhsharma@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1574972621-25750-1-git-send-email-bhsharma@redhat.com> List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "kexec" Errors-To: kexec-bounces+dwmw2=infradead.org@lists.infradead.org To: Bhupesh Sharma Cc: Mark Rutland , Jonathan Corbet , Dave Anderson , Ard Biesheuvel , Benjamin Herrenschmidt , linux-doc@vger.kernel.org, Will Deacon , x86@kernel.org, kexec@lists.infradead.org, linux-kernel@vger.kernel.org, Kazuhito Hagio , James Morse , Michael Ellerman , Catalin Marinas , Paul Mackerras , Thomas Gleixner , bhupesh.linux@gmail.com, linuxppc-dev@lists.ozlabs.org, Ingo Molnar , linux-arm-kernel@lists.infradead.org, Steve Capper On Fri, Nov 29, 2019 at 01:53:36AM +0530, Bhupesh Sharma wrote: > Bhupesh Sharma (5): > crash_core, vmcoreinfo: Append 'MAX_PHYSMEM_BITS' to vmcoreinfo > arm64/crash_core: Export TCR_EL1.T1SZ in vmcoreinfo > Documentation/arm64: Fix a simple typo in memory.rst > Documentation/vmcoreinfo: Add documentation for 'MAX_PHYSMEM_BITS' > Documentation/vmcoreinfo: Add documentation for 'TCR_EL1.T1SZ' why are those last two separate patches and not part of the patches which export the respective variable/define? -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette _______________________________________________ kexec mailing list kexec@lists.infradead.org http://lists.infradead.org/mailman/listinfo/kexec