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Date: Sun, 14 Apr 2013 22:58:44 -0700
From: Dave Hansen <dave@sr71.net>
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Subject: Re: [PATCH 5/5] kexec: X86: Pass memory ranges via e820 table instead
 of memmap= boot parameter
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To: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com>
Cc: "kexec@lists.infradead.org" <kexec@lists.infradead.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, Thomas Renninger <trenn@suse.de>, Simon Horman <horms@verge.net.au>, "Eric W. Biederman" <ebiederm@xmission.com>, "H. Peter Anvin" <hpa@zytor.com>, Yinghai Lu <yinghai@kernel.org>, Cliff Wickman <cpw@sgi.com>, Vivek Goyal <vgoyal@redhat.com>

On 04/14/2013 09:52 PM, HATAYAMA Daisuke wrote:
> This sounds like there's no such issue on x86 cache mechanism. Is it
> correct? If so, what is the difference between ia64 and x86 cache
> mechanisms?

I'm just going by the code comments:

drivers/char/mem.c
>                 /*
>                  * On ia64 if a page has been mapped somewhere as uncached, then
>                  * it must also be accessed uncached by the kernel or data
>                  * corruption may occur.
>                  */


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