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Date: Thu, 09 Apr 2015 12:53:58 +0900
From: AKASHI Takahiro <takahiro.akashi@linaro.org>
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Subject: Re: [v3 1/5] arm64: kvm: add a cpu tear-down function
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To: Mark Rutland <mark.rutland@arm.com>
Cc: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linaro-kernel@lists.linaro.org" <linaro-kernel@lists.linaro.org>, Marc Zyngier <Marc.Zyngier@arm.com>, Catalin Marinas <Catalin.Marinas@arm.com>, Will Deacon <Will.Deacon@arm.com>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "geoff@infradead.org" <geoff@infradead.org>, "broonie@kernel.org" <broonie@kernel.org>, "david.griego@linaro.org" <david.griego@linaro.org>, "kexec@lists.infradead.org" <kexec@lists.infradead.org>, "christoffer.dall@linaro.org" <christoffer.dall@linaro.org>, "freddy77@gmail.com" <freddy77@gmail.com>

On 04/08/2015 10:02 PM, Mark Rutland wrote:
>> +	/* We're now in idmap, disable MMU */
>> +1:	mrs	x0, sctlr_el2
>> +	and	x1, x0, #SCTLR_EL2_EE
>> +	orr	x0, x0, x1		// preserve endianness of EL2
>> +	ldr	x1, =SCTLR_EL2_FLAGS
>> +	eor	x1, x1, xzr
>> +	bic	x0, x0, x1		// Clear SCTL_M and etc
>> +	msr	sctlr_el2, x0
>> +	isb
>
> This can instead be:
>
> 1:	mrs	x0, sctlr_el2
> 	ldr	x1, =SCTLR_EL2_FLAGS
> 	bic	x0, x0, x1
> 	msr	sctlr_el2, x0
> 	isb
>
> As SCTLR_EL2_FLAGS doesn't contain the EE bit.

Oops. I will fix it.

Thanks,
-Takahiro AKASHI

> Mark.
>

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