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Fri, 15 May 2026 07:19:12 -0700 (PDT) Received: from plex ([71.181.43.54]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8c90c359c74sm52887436d6.45.2026.05.15.07.19.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2026 07:19:11 -0700 (PDT) Date: Fri, 15 May 2026 14:19:10 +0000 From: Pasha Tatashin To: George Guo Cc: pasha.tatashin@soleen.com, rppt@kernel.org, pratyush@kernel.org, graf@amazon.com, jasonmiu@google.com, ran.xiaokai@zte.com.cn, akpm@linux-foundation.org, linux-kernel@vger.kernel.org, kexec@lists.infradead.org, linux-mm@kvack.org, George Guo , Kexin Liu Subject: Re: [PATCH 1/1] kho: fix KHO_TREE_MAX_DEPTH for non-4KB page sizes Message-ID: References: <20260509024415.33190-1-dongtai.guo@linux.dev> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260509024415.33190-1-dongtai.guo@linux.dev> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260515_151914_725361_ED80643E X-CRM114-Status: GOOD ( 15.01 ) X-BeenThere: kexec@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kexec" Errors-To: kexec-bounces+kexec=archiver.kernel.org@lists.infradead.org On 05-09 10:44, George Guo wrote: > From: George Guo > > KHO_TREE_MAX_DEPTH is calculated as: > > DIV_ROUND_UP(KHO_ORDER_0_LOG2 - KHO_BITMAP_SIZE_LOG2, > KHO_TABLE_SIZE_LOG2) + 1 > > For systems with 16KB pages (e.g. LoongArch), this gives a depth of 4, > with the top-level shift at bit 39. The order-0 bit sits at bit 50 > (KHO_ORDER_0_LOG2 = 64 - PAGE_SHIFT = 50). When inserting or reading > a key, the index extracted at the top level is: > > (1 << 50) >> 39 = 2048 > > 2048 is exactly the table size (PAGE_SIZE / sizeof(phys_addr_t) = 2048 > for 16KB pages), so it wraps to 0, aliasing the order bit to index 0 > and losing it silently. > > On the second kernel, kho_radix_decode_key() sees a key without the > order bit, calls fls64() on the wrong bit, computes a wrong order and > thus a garbage physical address. phys_to_page() of that address faults > in kho_preserved_memory_reserve(), causing a kernel panic early in boot. > > Fix by adding +1 to the DIV_ROUND_UP numerator so the formula accounts > for the order bit itself, giving depth 5 for 16KB pages. The top-level > shift becomes 50, and (1 << 50) >> 50 = 1, which is nonzero and > unambiguous. For 4KB and 64KB page sizes the depth is unchanged. > > Fixes: 3f2ad90060f6 ("kho: adopt radix tree for preserved memory tracking") > > Tested-by: Kexin Liu > Signed-off-by: George Guo Reviewed-by: Pasha Tatashin The patch fixes 16K support on ARM64. Pasha