From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Mackerras Date: Fri, 27 May 2011 10:33:34 +0000 Subject: Re: [PATCH 10/13] kvm/powerpc: Add support for Book3S processors in Message-Id: <20110527103334.GA4236@brick.ozlabs.ibm.com> List-Id: References: <20110511103443.GA2837@brick.ozlabs.ibm.com> <20110511104456.GK2837@brick.ozlabs.ibm.com> <20110516055809.GA3590@drongo> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Alexander Graf Cc: Linuxppc-dev , KVM list , kvm-ppc@vger.kernel.org On Tue, May 17, 2011 at 12:17:50PM +0200, Alexander Graf wrote: > > On 16.05.2011, at 07:58, Paul Mackerras wrote: > > > I do the check there because I was having problems where, if the HDEC > > goes negative before we do the partition switch, we would occasionally > > not get the HDEC interrupt at all until the next time HDEC went > > negative, ~ 8.4 seconds later. > > Yikes - so HDEC is edge and doesn't even keep the interrupt line up? > That sounds like a serious hardware limitation. What if you only use > HDEC and it triggers while interrupts are off in a critical section? > Is the hardware really that broken? If HDEC expires when interrupts are off, the HDEC interrupt stays pending until interrupts get re-enabled. I'm not sure exactly what the conditions are that cause an HDEC interrupt to get lost, but they seem to involve at least a partition switch. Paul.