From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Mon, 09 Jan 2012 19:07:03 +0000 Subject: Re: [PATCH] KVM: PPC: Add generic single register ioctls Message-Id: <4F0B3AD7.9050609@freescale.com> List-Id: References: <02FFD6E9-1301-4A05-8F1F-913BE1677A90@suse.de> <1325823314-12758-1-git-send-email-agraf@suse.de> <4F074C45.5000507@freescale.com> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Alexander Graf Cc: "" , kvm list , Avi Kivity , Marcelo Tosatti On 01/06/2012 06:52 PM, Alexander Graf wrote: > > > On 06.01.2012, at 20:32, Scott Wood wrote: > >> On 01/05/2012 10:15 PM, Alexander Graf wrote: >> >>> +/* >>> + * Architecture specific registers are to be defined in arch headers and >>> + * ORed with the arch identifier. >>> + */ >>> +#define KVM_REG_PPC 0x1000000000000000ULL >>> +#define KVM_REG_X86 0x2000000000000000ULL >>> +#define KVM_REG_IA64 0x3000000000000000ULL >>> +#define KVM_REG_ARM 0x4000000000000000ULL >>> +#define KVM_REG_S390 0x5000000000000000ULL >>> + >>> +#define KVM_REG_SIZE_SHIFT 52 >>> +#define KVM_REG_SIZE_MASK 0x00f0000000000000ULL >>> +#define KVM_REG_SIZE_U8 0x0000000000000000ULL >>> +#define KVM_REG_SIZE_U16 0x0010000000000000ULL >>> +#define KVM_REG_SIZE_U32 0x0020000000000000ULL >>> +#define KVM_REG_SIZE_U64 0x0030000000000000ULL >>> +#define KVM_REG_SIZE_U128 0x0040000000000000ULL >>> +#define KVM_REG_SIZE_U256 0x0050000000000000ULL >>> +#define KVM_REG_SIZE_U512 0x0060000000000000ULL >>> +#define KVM_REG_SIZE_U1024 0x0070000000000000ULL >> >> Why not just encode directly as number of bytes? > > Because this is 1 << n bytes :) Some registers may not be a power-of-2 number of bytes (e.g. x86 segment descriptors), and we've got plenty of space to spare in the id. It's probably not worth another respin, though -- we can just document right/left justification in the event that we have such a register. -Scott