From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anthony Liguori Date: Tue, 07 Feb 2012 15:23:16 +0000 Subject: Re: [Qemu-devel] [RFC] Next gen kvm api Message-Id: <4F3141E4.8080902@codemonkey.ws> List-Id: References: <4F2AB552.2070909@redhat.com> <4F2B41D6.8020603@codemonkey.ws> <51470503-DEE0-478D-8D01-020834AF6E8C@suse.de> <4F3117E5.6000105@redhat.com> <4F31241C.70404@redhat.com> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Alexander Graf Cc: Avi Kivity , qemu-devel , kvm-ppc , KVM list , linux-kernel On 02/07/2012 07:40 AM, Alexander Graf wrote: > > Why? For the HPET timer register for example, we could have a simple MMIO hook that says > > on_read: > return read_current_time() - shared_page.offset; > on_write: > handle_in_user_space(); > > For IDE, it would be as simple as > > register_pio_hook_ptr_r(PIO_IDE, SIZE_BYTE,&s->cmd[0]); > for (i = 1; i< 7; i++) { > register_pio_hook_ptr_r(PIO_IDE + i, SIZE_BYTE,&s->cmd[i]); > register_pio_hook_ptr_w(PIO_IDE + i, SIZE_BYTE,&s->cmd[i]); > } You can't easily serialize updates to that address with the kernel since two threads are likely going to be accessing it at the same time. That either means an expensive sync operation or a reliance on atomic instructions. But not all architectures offer non-word sized atomic instructions so it gets fairly nasty in practice. Regards, Anthony Liguori