From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laurent Vivier Date: Wed, 16 Mar 2016 09:45:10 +0000 Subject: Re: [PATCH] powerpc: enable 64-bit mode Message-Id: <56E92B26.8020603@redhat.com> List-Id: References: <1458047717-25052-1-git-send-email-lvivier@redhat.com> <56E857C2.2020404@redhat.com> <56E85807.5050903@suse.de> In-Reply-To: <56E85807.5050903@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Alexander Graf , Thomas Huth , kvm@vger.kernel.org, kvm-ppc@vger.kernel.org Cc: drjones@redhat.com, dgibson@redhat.com, pbonzini@redhat.com On 15/03/2016 19:44, Alexander Graf wrote: > > > On 15.03.16 19:43, Thomas Huth wrote: >> On 15.03.2016 14:15, Laurent Vivier wrote: >>> When they are started, processors are in 32-bit mode, >>> as we are testing ppc64 processors, enable the 64bit mode >>> on starting. >>> >>> Signed-off-by: Laurent Vivier >>> --- >>> powerpc/cstart64.S | 9 +++++++++ >>> 1 file changed, 9 insertions(+) >>> >>> diff --git a/powerpc/cstart64.S b/powerpc/cstart64.S >>> index c87e3d6..634b854 100644 >>> --- a/powerpc/cstart64.S >>> +++ b/powerpc/cstart64.S >>> @@ -18,6 +18,15 @@ >>> .globl start >>> start: >>> FIXUP_ENDIAN >>> + >>> + /* enable 64-bit mode */ >>> + mfmsr r11 >>> + li r12,-1 >>> + rldicr r12,r12,0,0 >> >> Nice idea to set the highest bit, I didn't know that one yet :-) >> >>> + or r11,r11,r12 >>> + mtmsrd r11 >>> + isync >> >> Looks good! >> >> Reviewed-by: Thomas Huth >> >> >> PS: As far as I can see, the C code has already been compiled for 64 >> bits ... how did that work if it has been run in 32-bit mode so far?? > > And why would we enter a 64bit CPU without MSR_SF set? OK, it seems to be a bug in QEMU. I've sent a patch to QEMU ML trying to fix that. Laurent