From: Kumar Gala <galak@kernel.crashing.org>
To: kvm-ppc@vger.kernel.org
Subject: Re: [linuxppc-release] [PATCH v4 2/4] powerpc/e500: SPE register saving: take arbitrary struct offse
Date: Thu, 31 Mar 2011 06:21:18 +0000 [thread overview]
Message-ID: <B2936EF6-F32C-4357-B320-F0E243B7740B@kernel.crashing.org> (raw)
In-Reply-To: <20110330220003.GA13156@schlenkerla.am.freescale.net>
On Mar 30, 2011, at 5:00 PM, Scott Wood wrote:
> This allows reuse for saving/restoring KVM SPE state.
Can you update commit comment to include a little about how we accomplish that. (something about the macro change is all I'm looking for)
[otherwise ACK]
>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> v4 of patchset, first version of this patch
>
> Kumar, please ack (or comment).
>
> arch/powerpc/include/asm/ppc_asm.h | 28 ++++++++++++++++------------
> arch/powerpc/kernel/head_fsl_booke.S | 6 +++---
> 2 files changed, 19 insertions(+), 15 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
> index 9821006..ba0cd33 100644
> --- a/arch/powerpc/include/asm/ppc_asm.h
> +++ b/arch/powerpc/include/asm/ppc_asm.h
> @@ -150,18 +150,22 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
> #define REST_16VSRSU(n,b,base) REST_8VSRSU(n,b,base); REST_8VSRSU(n+8,b,base)
> #define REST_32VSRSU(n,b,base) REST_16VSRSU(n,b,base); REST_16VSRSU(n+16,b,base)
>
> -#define SAVE_EVR(n,s,base) evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base)
> -#define SAVE_2EVRS(n,s,base) SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base)
> -#define SAVE_4EVRS(n,s,base) SAVE_2EVRS(n,s,base); SAVE_2EVRS(n+2,s,base)
> -#define SAVE_8EVRS(n,s,base) SAVE_4EVRS(n,s,base); SAVE_4EVRS(n+4,s,base)
> -#define SAVE_16EVRS(n,s,base) SAVE_8EVRS(n,s,base); SAVE_8EVRS(n+8,s,base)
> -#define SAVE_32EVRS(n,s,base) SAVE_16EVRS(n,s,base); SAVE_16EVRS(n+16,s,base)
> -#define REST_EVR(n,s,base) lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n
> -#define REST_2EVRS(n,s,base) REST_EVR(n,s,base); REST_EVR(n+1,s,base)
> -#define REST_4EVRS(n,s,base) REST_2EVRS(n,s,base); REST_2EVRS(n+2,s,base)
> -#define REST_8EVRS(n,s,base) REST_4EVRS(n,s,base); REST_4EVRS(n+4,s,base)
> -#define REST_16EVRS(n,s,base) REST_8EVRS(n,s,base); REST_8EVRS(n+8,s,base)
> -#define REST_32EVRS(n,s,base) REST_16EVRS(n,s,base); REST_16EVRS(n+16,s,base)
> +/*
> + * b = base register for addressing, o = base offset from register of 1st EVR
> + * n = first EVR, s = scratch
> + */
> +#define SAVE_EVR(n,s,b,o) evmergehi s,s,n; stw s,o+4*(n)(b)
> +#define SAVE_2EVRS(n,s,b,o) SAVE_EVR(n,s,b,o); SAVE_EVR(n+1,s,b,o)
> +#define SAVE_4EVRS(n,s,b,o) SAVE_2EVRS(n,s,b,o); SAVE_2EVRS(n+2,s,b,o)
> +#define SAVE_8EVRS(n,s,b,o) SAVE_4EVRS(n,s,b,o); SAVE_4EVRS(n+4,s,b,o)
> +#define SAVE_16EVRS(n,s,b,o) SAVE_8EVRS(n,s,b,o); SAVE_8EVRS(n+8,s,b,o)
> +#define SAVE_32EVRS(n,s,b,o) SAVE_16EVRS(n,s,b,o); SAVE_16EVRS(n+16,s,b,o)
> +#define REST_EVR(n,s,b,o) lwz s,o+4*(n)(b); evmergelo n,s,n
> +#define REST_2EVRS(n,s,b,o) REST_EVR(n,s,b,o); REST_EVR(n+1,s,b,o)
> +#define REST_4EVRS(n,s,b,o) REST_2EVRS(n,s,b,o); REST_2EVRS(n+2,s,b,o)
> +#define REST_8EVRS(n,s,b,o) REST_4EVRS(n,s,b,o); REST_4EVRS(n+4,s,b,o)
> +#define REST_16EVRS(n,s,b,o) REST_8EVRS(n,s,b,o); REST_8EVRS(n+8,s,b,o)
> +#define REST_32EVRS(n,s,b,o) REST_16EVRS(n,s,b,o); REST_16EVRS(n+16,s,b,o)
>
> /* Macros to adjust thread priority for hardware multithreading */
> #define HMT_VERY_LOW or 31,31,31 # very low priority
> diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
> index b84fc5e..e234153 100644
> --- a/arch/powerpc/kernel/head_fsl_booke.S
> +++ b/arch/powerpc/kernel/head_fsl_booke.S
> @@ -656,7 +656,7 @@ load_up_spe:
> cmpi 0,r4,0
> beq 1f
> addi r4,r4,THREAD /* want THREAD of last_task_used_spe */
> - SAVE_32EVRS(0,r10,r4)
> + SAVE_32EVRS(0,r10,r4,THREAD_EVR0)
> evxor evr10, evr10, evr10 /* clear out evr10 */
> evmwumiaa evr10, evr10, evr10 /* evr10 <- ACC = 0 * 0 + ACC */
> li r5,THREAD_ACC
> @@ -676,7 +676,7 @@ load_up_spe:
> stw r4,THREAD_USED_SPE(r5)
> evlddx evr4,r10,r5
> evmra evr4,evr4
> - REST_32EVRS(0,r10,r5)
> + REST_32EVRS(0,r10,r5,THREAD_EVR0)
> #ifndef CONFIG_SMP
> subi r4,r5,THREAD
> stw r4,last_task_used_spe@l(r3)
> @@ -787,7 +787,7 @@ _GLOBAL(giveup_spe)
> addi r3,r3,THREAD /* want THREAD of task */
> lwz r5,PT_REGS(r3)
> cmpi 0,r5,0
> - SAVE_32EVRS(0, r4, r3)
> + SAVE_32EVRS(0, r4, r3, THREAD_EVR0)
> evxor evr6, evr6, evr6 /* clear out evr6 */
> evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */
> li r4,THREAD_ACC
> --
> 1.7.1
>
> _______________________________________________
> linuxppc-release mailing list
> linuxppc-release@linux.freescale.net
> http://linux.freescale.net/mailman/listinfo/linuxppc-release
next prev parent reply other threads:[~2011-03-31 6:21 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-30 22:00 [PATCH v4 2/4] powerpc/e500: SPE register saving: take arbitrary Scott Wood
2011-03-31 6:21 ` Kumar Gala [this message]
2011-04-01 18:46 ` [linuxppc-release] [PATCH v4 2/4] powerpc/e500: SPE register Scott Wood
2011-04-05 14:57 ` Alexander Graf
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=B2936EF6-F32C-4357-B320-F0E243B7740B@kernel.crashing.org \
--to=galak@kernel.crashing.org \
--cc=kvm-ppc@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).