From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH 00/10] RISC-V: Refactor instructions
Date: Thu, 7 Sep 2023 10:51:49 +0200 [thread overview]
Message-ID: <20230907-304f53e7de4e0386d04f4dcf@orel> (raw)
In-Reply-To: <ZPjKGd7VstwIKDV5@ghost>
On Wed, Sep 06, 2023 at 11:51:05AM -0700, Charlie Jenkins wrote:
> On Fri, Aug 18, 2023 at 09:30:32AM +0200, Andrew Jones wrote:
> > On Thu, Aug 17, 2023 at 10:52:22AM -0700, Palmer Dabbelt wrote:
> > > On Thu, 17 Aug 2023 09:43:16 PDT (-0700), Charlie Jenkins wrote:
> > ...
> > > > It seems to me that it will be significantly more challenging to use
> > > > riscv-opcodes than it would for people to just hand create the macros
> > > > that they need.
> > >
> > > Ya, riscv-opcodes is pretty custy. We stopped using it elsewhere ages ago.
> >
> > Ah, pity I didn't know the history of it or I wouldn't have suggested it,
> > wasting Charlie's time (sorry, Charlie!). So everywhere that needs
> > encodings are manually scraping them from the PDFs? Or maybe we can write
> > our own parser which converts adoc/wavedrom files[1] to Linux C?
> >
> > [1] https://github.com/riscv/riscv-isa-manual/tree/main/src/images/wavedrom
>
> The problem with the wavedrom files is that there are no standard for
> how each instruction is identified. The title of of the adoc gives some
> insight and there is generally a funct3 or specific opcode that is
> associated with the instruction but it would be kind of messy to write a
> script to parse that. I think manually constructing the instructions is
> fine. When somebody wants to add a new instruction they probably will
> not need to add very many at a time, so it should be only a couple of
> lines that they will be able to test.
>
OK, we'll just have to prop our eyelids open with toothpicks to get
through the review of the initial mass conversion.
Thanks,
drew
prev parent reply other threads:[~2023-09-07 8:51 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-04 2:10 [PATCH 00/10] RISC-V: Refactor instructions Charlie Jenkins
2023-08-04 2:10 ` [PATCH 01/10] RISC-V: Expand instruction definitions Charlie Jenkins
2023-08-04 7:59 ` Conor Dooley
2023-08-04 17:26 ` Charlie Jenkins
2023-08-04 2:10 ` [PATCH 02/10] RISC-V: vector: Refactor instructions Charlie Jenkins
2023-08-04 2:10 ` [PATCH 03/10] RISC-V: Refactor jump label instructions Charlie Jenkins
2023-08-04 2:10 ` [PATCH 04/10] RISC-V: KGDB: Refactor instructions Charlie Jenkins
2023-08-04 2:10 ` [PATCH 05/10] RISC-V: module: " Charlie Jenkins
2023-08-04 2:10 ` [PATCH 06/10] RISC-V: Refactor patch instructions Charlie Jenkins
2023-08-04 2:10 ` [PATCH 07/10] RISC-V: nommu: Refactor instructions Charlie Jenkins
2023-08-04 2:10 ` [PATCH 08/10] RISC-V: kvm: " Charlie Jenkins
2023-08-04 2:10 ` [PATCH 09/10] RISC-V: bpf: " Charlie Jenkins
2023-08-04 2:10 ` [PATCH 10/10] RISC-V: Refactor bug and traps instructions Charlie Jenkins
2023-08-04 5:16 ` kernel test robot
2023-08-04 9:28 ` [PATCH 00/10] RISC-V: Refactor instructions Andrew Jones
2023-08-04 17:24 ` Charlie Jenkins
2023-08-17 0:31 ` Charlie Jenkins
2023-08-17 3:57 ` Jessica Clarke
2023-08-17 4:05 ` Jessica Clarke
2023-08-17 16:43 ` Charlie Jenkins
2023-08-17 17:52 ` Palmer Dabbelt
2023-08-18 7:30 ` Andrew Jones
2023-09-06 18:51 ` Charlie Jenkins
2023-09-07 8:51 ` Andrew Jones [this message]
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