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From: Chao Du <duchao@eswincomputing.com>
To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	anup@brainfault.org, atishp@atishpatra.org,
	paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu
Subject: [PATCH] RISC-V: KVM: Fix comments in kvm_riscv_vcpu_isa_disable_allowed
Date: Thu, 20 Feb 2025 07:49:05 +0000	[thread overview]
Message-ID: <20250220074905.29014-1-duchao@eswincomputing.com> (raw)

The comments for EXT_SVADE are opposite with the codes. Fix it to avoid
confusion.

Signed-off-by: Chao Du <duchao@eswincomputing.com>
---
 arch/riscv/kvm/vcpu_onereg.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index f6d27b59c641..6df41794e346 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -203,7 +203,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
 	case KVM_RISCV_ISA_EXT_SVADE:
 		/*
 		 * The henvcfg.ADUE is read-only zero if menvcfg.ADUE is zero.
-		 * Svade is not allowed to disable when the platform use Svade.
+		 * Svade is allowed to disable when the platform use Svade.
 		 */
 		return arch_has_hw_pte_young();
 	default:
-- 
2.34.1


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             reply	other threads:[~2025-02-20  7:49 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-20  7:49 Chao Du [this message]
2025-02-20 15:54 ` [PATCH] RISC-V: KVM: Fix comments in kvm_riscv_vcpu_isa_disable_allowed Andrew Jones
2025-02-21  2:28   ` Chao Du

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