From: Andrew Jones <andrew.jones@linux.dev>
To: "Clément Léger" <cleger@rivosinc.com>
Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
Andrew Jones <ajones@ventanamicro.com>,
Ved Shanbhogue <ved@rivosinc.com>
Subject: Re: [kvm-unit-tests v2 2/2] riscv: Add ISA double trap extension testing
Date: Thu, 5 Jun 2025 12:34:28 +0200 [thread overview]
Message-ID: <20250605-804fba12f792b0f8cde255d3@orel> (raw)
In-Reply-To: <f8acf479-4a80-4128-bdd3-4ae69e0c215c@rivosinc.com>
On Thu, Jun 05, 2025 at 11:52:14AM +0200, Clément Léger wrote:
...
> >> + if (sbi_probe(SBI_EXT_SSE)) {
> >> + if (sse_double_trap()) {
> >> + report_skip("Could not correctly unregister SSE event, skipping last test");
> >> + return;
> >> + }
> >> + } else {
> >> + report_skip("SSE double trap event will not be tested, extension is not available");
> >
> > Missing return
>
> That's actually telling us it skipped the SSE + double trap test, not
> the rest of this function. So that should be kept without any return or
> we will skip the last test.
>
Ah, yes.
Thanks,
drew
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prev parent reply other threads:[~2025-06-05 10:35 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-03 15:46 [kvm-unit-tests v2 0/2] riscv: Add double trap testing Clément Léger
2025-06-03 15:46 ` [kvm-unit-tests v2 1/2] lib/riscv: export FWFT functions Clément Léger
2025-06-03 15:46 ` [kvm-unit-tests v2 2/2] riscv: Add ISA double trap extension testing Clément Léger
2025-06-03 16:25 ` Andrew Jones
2025-06-05 9:52 ` Clément Léger
2025-06-05 10:34 ` Andrew Jones [this message]
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