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From: dayss1224@gmail.com
To: pbonzini@redhat.com, shuah@kernel.org, anup@brainfault.org
Cc: atish.patra@linux.dev, paul.walmsley@sifive.com,
	palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr,
	kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
	linux-kernel@vger.kernel.org, kvm-riscv@lists.infradead.org,
	linux-riscv@lists.infradead.org, Quan Zhou <zhouquan@iscas.ac.cn>,
	Dong Yang <dayss1224@gmail.com>,
	Andrew Jones <ajones@ventanamicro.com>
Subject: [PATCH v3 1/3] KVM: riscv: selftests: Use the existing RISCV_FENCE macro in `rseq-riscv.h`
Date: Mon,  1 Sep 2025 15:35:49 +0800	[thread overview]
Message-ID: <85e5e51757c9289ca463fbc4ba6d22f9c9db791b.1756710918.git.dayss1224@gmail.com> (raw)
In-Reply-To: <cover.1756710918.git.dayss1224@gmail.com>

From: Quan Zhou <zhouquan@iscas.ac.cn>

To avoid redefinition issues with RISCV_FENCE,
 directly reference the existing macro in `rseq-riscv.h`.

Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
Signed-off-by: Dong Yang <dayss1224@gmail.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 tools/testing/selftests/rseq/rseq-riscv.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/tools/testing/selftests/rseq/rseq-riscv.h b/tools/testing/selftests/rseq/rseq-riscv.h
index 67d544aaa9a3..06c840e81c8b 100644
--- a/tools/testing/selftests/rseq/rseq-riscv.h
+++ b/tools/testing/selftests/rseq/rseq-riscv.h
@@ -8,6 +8,7 @@
  * exception when executed in all modes.
  */
 #include <endian.h>
+#include <asm/fence.h>
 
 #if defined(__BYTE_ORDER) ? (__BYTE_ORDER == __LITTLE_ENDIAN) : defined(__LITTLE_ENDIAN)
 #define RSEQ_SIG   0xf1401073  /* csrr mhartid, x0 */
@@ -24,8 +25,6 @@
 #define REG_L	__REG_SEL("ld ", "lw ")
 #define REG_S	__REG_SEL("sd ", "sw ")
 
-#define RISCV_FENCE(p, s) \
-	__asm__ __volatile__ ("fence " #p "," #s : : : "memory")
 #define rseq_smp_mb()	RISCV_FENCE(rw, rw)
 #define rseq_smp_rmb()	RISCV_FENCE(r, r)
 #define rseq_smp_wmb()	RISCV_FENCE(w, w)
-- 
2.34.1


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  reply	other threads:[~2025-09-01  8:01 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-01  7:35 [PATCH v3 0/3] KVM: riscv: selftests: Enable supported test cases dayss1224
2025-09-01  7:35 ` dayss1224 [this message]
2025-09-01  7:35 ` [PATCH v3 2/3] KVM: riscv: selftests: Add missing headers for new testcases dayss1224
2025-09-01  7:35 ` [PATCH v3 3/3] KVM: riscv: selftests: Add common supported test cases dayss1224
2025-09-02 15:36 ` [PATCH v3 0/3] KVM: riscv: selftests: Enable " Andrew Jones
2025-09-04  9:48   ` Dong Yang
2025-09-03 14:31 ` Anup Patel

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