* [PATCH] RISC-V: KVM: Fix SBI_FWFT_POINTER_MASKING_PMLEN algorithm
@ 2025-09-15 5:34 Samuel Holland
2025-09-15 15:26 ` Andrew Jones
2025-09-16 5:38 ` Anup Patel
0 siblings, 2 replies; 3+ messages in thread
From: Samuel Holland @ 2025-09-15 5:34 UTC (permalink / raw)
To: Anup Patel, Atish Patra, kvm-riscv
Cc: Samuel Holland, Albert Ou, Alexandre Ghiti, Palmer Dabbelt,
Paul Walmsley, kvm, linux-kernel, linux-riscv
The implementation of SBI_FWFT_POINTER_MASKING_PMLEN from commit
aa04d131b88b ("RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN")
was based on a draft of the SBI 3.0 specification, and is not compliant
with the ratified version.
Update the algorithm to be compliant. Specifically, do not fall back to
a pointer masking mode with a larger PMLEN if the mode with the
requested PMLEN is unsupported by the hardware.
Fixes: aa04d131b88b ("RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
---
I saw that the RFC version of this patch already made it into
riscv_kvm_queue, but it needs an update for ratified SBI 3.0. Feel free
to squash this into the original commit, or I can send a replacement v2
patch if you prefer.
arch/riscv/kvm/vcpu_sbi_fwft.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/kvm/vcpu_sbi_fwft.c b/arch/riscv/kvm/vcpu_sbi_fwft.c
index cacb3d4410a54..62cc9c3d57599 100644
--- a/arch/riscv/kvm/vcpu_sbi_fwft.c
+++ b/arch/riscv/kvm/vcpu_sbi_fwft.c
@@ -160,14 +160,23 @@ static long kvm_sbi_fwft_set_pointer_masking_pmlen(struct kvm_vcpu *vcpu,
struct kvm_sbi_fwft *fwft = vcpu_to_fwft(vcpu);
unsigned long pmm;
- if (value == 0)
+ switch (value) {
+ case 0:
pmm = ENVCFG_PMM_PMLEN_0;
- else if (value <= 7 && fwft->have_vs_pmlen_7)
+ break;
+ case 7:
+ if (!fwft->have_vs_pmlen_7)
+ return SBI_ERR_INVALID_PARAM;
pmm = ENVCFG_PMM_PMLEN_7;
- else if (value <= 16 && fwft->have_vs_pmlen_16)
+ break;
+ case 16:
+ if (!fwft->have_vs_pmlen_16)
+ return SBI_ERR_INVALID_PARAM;
pmm = ENVCFG_PMM_PMLEN_16;
- else
+ break;
+ default:
return SBI_ERR_INVALID_PARAM;
+ }
vcpu->arch.cfg.henvcfg &= ~ENVCFG_PMM;
vcpu->arch.cfg.henvcfg |= pmm;
--
2.47.2
base-commit: 7835b892d1d9f52fb61537757aa446fb44984215
branch: up/kvm-fwft-pmlen
--
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^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] RISC-V: KVM: Fix SBI_FWFT_POINTER_MASKING_PMLEN algorithm
2025-09-15 5:34 [PATCH] RISC-V: KVM: Fix SBI_FWFT_POINTER_MASKING_PMLEN algorithm Samuel Holland
@ 2025-09-15 15:26 ` Andrew Jones
2025-09-16 5:38 ` Anup Patel
1 sibling, 0 replies; 3+ messages in thread
From: Andrew Jones @ 2025-09-15 15:26 UTC (permalink / raw)
To: Samuel Holland
Cc: Anup Patel, Atish Patra, kvm-riscv, Albert Ou, Alexandre Ghiti,
Palmer Dabbelt, Paul Walmsley, kvm, linux-kernel, linux-riscv
On Sun, Sep 14, 2025 at 10:34:20PM -0700, Samuel Holland wrote:
> The implementation of SBI_FWFT_POINTER_MASKING_PMLEN from commit
> aa04d131b88b ("RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN")
> was based on a draft of the SBI 3.0 specification, and is not compliant
> with the ratified version.
>
> Update the algorithm to be compliant. Specifically, do not fall back to
> a pointer masking mode with a larger PMLEN if the mode with the
> requested PMLEN is unsupported by the hardware.
>
> Fixes: aa04d131b88b ("RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN")
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
> ---
> I saw that the RFC version of this patch already made it into
> riscv_kvm_queue, but it needs an update for ratified SBI 3.0. Feel free
> to squash this into the original commit, or I can send a replacement v2
> patch if you prefer.
>
> arch/riscv/kvm/vcpu_sbi_fwft.c | 17 +++++++++++++----
> 1 file changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu_sbi_fwft.c b/arch/riscv/kvm/vcpu_sbi_fwft.c
> index cacb3d4410a54..62cc9c3d57599 100644
> --- a/arch/riscv/kvm/vcpu_sbi_fwft.c
> +++ b/arch/riscv/kvm/vcpu_sbi_fwft.c
> @@ -160,14 +160,23 @@ static long kvm_sbi_fwft_set_pointer_masking_pmlen(struct kvm_vcpu *vcpu,
> struct kvm_sbi_fwft *fwft = vcpu_to_fwft(vcpu);
> unsigned long pmm;
>
> - if (value == 0)
> + switch (value) {
> + case 0:
> pmm = ENVCFG_PMM_PMLEN_0;
> - else if (value <= 7 && fwft->have_vs_pmlen_7)
> + break;
> + case 7:
> + if (!fwft->have_vs_pmlen_7)
> + return SBI_ERR_INVALID_PARAM;
> pmm = ENVCFG_PMM_PMLEN_7;
> - else if (value <= 16 && fwft->have_vs_pmlen_16)
> + break;
> + case 16:
> + if (!fwft->have_vs_pmlen_16)
> + return SBI_ERR_INVALID_PARAM;
> pmm = ENVCFG_PMM_PMLEN_16;
> - else
> + break;
> + default:
> return SBI_ERR_INVALID_PARAM;
> + }
>
> vcpu->arch.cfg.henvcfg &= ~ENVCFG_PMM;
> vcpu->arch.cfg.henvcfg |= pmm;
> --
> 2.47.2
>
> base-commit: 7835b892d1d9f52fb61537757aa446fb44984215
> branch: up/kvm-fwft-pmlen
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
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^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] RISC-V: KVM: Fix SBI_FWFT_POINTER_MASKING_PMLEN algorithm
2025-09-15 5:34 [PATCH] RISC-V: KVM: Fix SBI_FWFT_POINTER_MASKING_PMLEN algorithm Samuel Holland
2025-09-15 15:26 ` Andrew Jones
@ 2025-09-16 5:38 ` Anup Patel
1 sibling, 0 replies; 3+ messages in thread
From: Anup Patel @ 2025-09-16 5:38 UTC (permalink / raw)
To: Samuel Holland
Cc: Atish Patra, kvm-riscv, Albert Ou, Alexandre Ghiti,
Palmer Dabbelt, Paul Walmsley, kvm, linux-kernel, linux-riscv
On Mon, Sep 15, 2025 at 11:04 AM Samuel Holland
<samuel.holland@sifive.com> wrote:
>
> The implementation of SBI_FWFT_POINTER_MASKING_PMLEN from commit
> aa04d131b88b ("RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN")
> was based on a draft of the SBI 3.0 specification, and is not compliant
> with the ratified version.
>
> Update the algorithm to be compliant. Specifically, do not fall back to
> a pointer masking mode with a larger PMLEN if the mode with the
> requested PMLEN is unsupported by the hardware.
>
> Fixes: aa04d131b88b ("RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN")
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
> ---
> I saw that the RFC version of this patch already made it into
> riscv_kvm_queue, but it needs an update for ratified SBI 3.0. Feel free
> to squash this into the original commit, or I can send a replacement v2
> patch if you prefer.
Since this is fixing a commit in riscv_kvm_queue, I have squashed this
patch into the respective commit along with Drew's Reviewed-by.
Thanks,
Anup
>
> arch/riscv/kvm/vcpu_sbi_fwft.c | 17 +++++++++++++----
> 1 file changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu_sbi_fwft.c b/arch/riscv/kvm/vcpu_sbi_fwft.c
> index cacb3d4410a54..62cc9c3d57599 100644
> --- a/arch/riscv/kvm/vcpu_sbi_fwft.c
> +++ b/arch/riscv/kvm/vcpu_sbi_fwft.c
> @@ -160,14 +160,23 @@ static long kvm_sbi_fwft_set_pointer_masking_pmlen(struct kvm_vcpu *vcpu,
> struct kvm_sbi_fwft *fwft = vcpu_to_fwft(vcpu);
> unsigned long pmm;
>
> - if (value == 0)
> + switch (value) {
> + case 0:
> pmm = ENVCFG_PMM_PMLEN_0;
> - else if (value <= 7 && fwft->have_vs_pmlen_7)
> + break;
> + case 7:
> + if (!fwft->have_vs_pmlen_7)
> + return SBI_ERR_INVALID_PARAM;
> pmm = ENVCFG_PMM_PMLEN_7;
> - else if (value <= 16 && fwft->have_vs_pmlen_16)
> + break;
> + case 16:
> + if (!fwft->have_vs_pmlen_16)
> + return SBI_ERR_INVALID_PARAM;
> pmm = ENVCFG_PMM_PMLEN_16;
> - else
> + break;
> + default:
> return SBI_ERR_INVALID_PARAM;
> + }
>
> vcpu->arch.cfg.henvcfg &= ~ENVCFG_PMM;
> vcpu->arch.cfg.henvcfg |= pmm;
> --
> 2.47.2
>
> base-commit: 7835b892d1d9f52fb61537757aa446fb44984215
> branch: up/kvm-fwft-pmlen
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2025-09-15 5:34 [PATCH] RISC-V: KVM: Fix SBI_FWFT_POINTER_MASKING_PMLEN algorithm Samuel Holland
2025-09-15 15:26 ` Andrew Jones
2025-09-16 5:38 ` Anup Patel
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