From: Atish Patra <atishp@atishpatra.org>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH v3 08/10] RISC-V: KVM: Expose APLIC registers as attributes of AIA irqchip
Date: Fri, 16 Jun 2023 00:34:58 -0700 [thread overview]
Message-ID: <CAOnJCUJG9ewVvFP7H+6++m0x=Mkc5RLMnBTdiSvcu61vZSvapw@mail.gmail.com> (raw)
In-Reply-To: <20230615073353.85435-9-apatel@ventanamicro.com>
On Thu, Jun 15, 2023 at 12:34?AM Anup Patel <apatel@ventanamicro.com> wrote:
>
> We expose APLIC registers as KVM device attributes of the in-kernel
> AIA irqchip device. This will allow KVM user-space to save/restore
> APLIC state using KVM device ioctls().
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/include/asm/kvm_aia.h | 3 +++
> arch/riscv/include/uapi/asm/kvm.h | 6 +++++
> arch/riscv/kvm/aia_aplic.c | 43 +++++++++++++++++++++++++++++++
> arch/riscv/kvm/aia_device.c | 25 ++++++++++++++++++
> 4 files changed, 77 insertions(+)
>
> diff --git a/arch/riscv/include/asm/kvm_aia.h b/arch/riscv/include/asm/kvm_aia.h
> index f6bd8523395f..ba939c0054aa 100644
> --- a/arch/riscv/include/asm/kvm_aia.h
> +++ b/arch/riscv/include/asm/kvm_aia.h
> @@ -129,6 +129,9 @@ static inline void kvm_riscv_vcpu_aia_imsic_cleanup(struct kvm_vcpu *vcpu)
> {
> }
>
> +int kvm_riscv_aia_aplic_set_attr(struct kvm *kvm, unsigned long type, u32 v);
> +int kvm_riscv_aia_aplic_get_attr(struct kvm *kvm, unsigned long type, u32 *v);
> +int kvm_riscv_aia_aplic_has_attr(struct kvm *kvm, unsigned long type);
> int kvm_riscv_aia_aplic_inject(struct kvm *kvm, u32 source, bool level);
> int kvm_riscv_aia_aplic_init(struct kvm *kvm);
> void kvm_riscv_aia_aplic_cleanup(struct kvm *kvm);
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index 047c8fc5bd71..9ed822fc5589 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -249,6 +249,12 @@ enum KVM_RISCV_SBI_EXT_ID {
> #define KVM_DEV_RISCV_AIA_GRP_CTRL 2
> #define KVM_DEV_RISCV_AIA_CTRL_INIT 0
>
> +/*
> + * The device attribute type contains the memory mapped offset of the
> + * APLIC register (range 0x0000-0x3FFF) and it must be 4-byte aligned.
> + */
> +#define KVM_DEV_RISCV_AIA_GRP_APLIC 3
> +
> /* One single KVM irqchip, ie. the AIA */
> #define KVM_NR_IRQCHIPS 1
>
> diff --git a/arch/riscv/kvm/aia_aplic.c b/arch/riscv/kvm/aia_aplic.c
> index eecd8f4abe21..39e72aa016a4 100644
> --- a/arch/riscv/kvm/aia_aplic.c
> +++ b/arch/riscv/kvm/aia_aplic.c
> @@ -501,6 +501,49 @@ static struct kvm_io_device_ops aplic_iodoev_ops = {
> .write = aplic_mmio_write,
> };
>
> +int kvm_riscv_aia_aplic_set_attr(struct kvm *kvm, unsigned long type, u32 v)
> +{
> + int rc;
> +
> + if (!kvm->arch.aia.aplic_state)
> + return -ENODEV;
> +
> + rc = aplic_mmio_write_offset(kvm, type, v);
> + if (rc)
> + return rc;
> +
> + return 0;
> +}
> +
> +int kvm_riscv_aia_aplic_get_attr(struct kvm *kvm, unsigned long type, u32 *v)
> +{
> + int rc;
> +
> + if (!kvm->arch.aia.aplic_state)
> + return -ENODEV;
> +
> + rc = aplic_mmio_read_offset(kvm, type, v);
> + if (rc)
> + return rc;
> +
> + return 0;
> +}
> +
> +int kvm_riscv_aia_aplic_has_attr(struct kvm *kvm, unsigned long type)
> +{
> + int rc;
> + u32 val;
> +
> + if (!kvm->arch.aia.aplic_state)
> + return -ENODEV;
> +
> + rc = aplic_mmio_read_offset(kvm, type, &val);
> + if (rc)
> + return rc;
> +
> + return 0;
> +}
> +
> int kvm_riscv_aia_aplic_init(struct kvm *kvm)
> {
> int i, ret = 0;
> diff --git a/arch/riscv/kvm/aia_device.c b/arch/riscv/kvm/aia_device.c
> index 7ab555121872..c649ad6e8e0a 100644
> --- a/arch/riscv/kvm/aia_device.c
> +++ b/arch/riscv/kvm/aia_device.c
> @@ -365,6 +365,15 @@ static int aia_set_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
> break;
> }
>
> + break;
> + case KVM_DEV_RISCV_AIA_GRP_APLIC:
> + if (copy_from_user(&nr, uaddr, sizeof(nr)))
> + return -EFAULT;
> +
> + mutex_lock(&dev->kvm->lock);
> + r = kvm_riscv_aia_aplic_set_attr(dev->kvm, type, nr);
> + mutex_unlock(&dev->kvm->lock);
> +
> break;
> }
>
> @@ -412,6 +421,20 @@ static int aia_get_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
> if (copy_to_user(uaddr, &addr, sizeof(addr)))
> return -EFAULT;
>
> + break;
> + case KVM_DEV_RISCV_AIA_GRP_APLIC:
> + if (copy_from_user(&nr, uaddr, sizeof(nr)))
> + return -EFAULT;
> +
> + mutex_lock(&dev->kvm->lock);
> + r = kvm_riscv_aia_aplic_get_attr(dev->kvm, type, &nr);
> + mutex_unlock(&dev->kvm->lock);
> + if (r)
> + return r;
> +
> + if (copy_to_user(uaddr, &nr, sizeof(nr)))
> + return -EFAULT;
> +
> break;
> }
>
> @@ -448,6 +471,8 @@ static int aia_has_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
> return 0;
> }
> break;
> + case KVM_DEV_RISCV_AIA_GRP_APLIC:
> + return kvm_riscv_aia_aplic_has_attr(dev->kvm, attr->attr);
> }
>
> return -ENXIO;
> --
> 2.34.1
>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
--
Regards,
Atish
next prev parent reply other threads:[~2023-06-16 7:34 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-15 7:33 [PATCH v3 00/10] RISC-V KVM in-kernel AIA irqchip Anup Patel
2023-06-15 7:33 ` [PATCH v3 01/10] RISC-V: KVM: Implement guest external interrupt line management Anup Patel
2023-06-15 7:33 ` [PATCH v3 02/10] RISC-V: KVM: Add IMSIC related defines Anup Patel
2023-06-15 7:33 ` [PATCH v3 03/10] RISC-V: KVM: Add APLIC " Anup Patel
2023-06-15 7:33 ` [PATCH v3 04/10] RISC-V: KVM: Set kvm_riscv_aia_nr_hgei to zero Anup Patel
2023-06-15 7:33 ` [PATCH v3 05/10] RISC-V: KVM: Skeletal in-kernel AIA irqchip support Anup Patel
2023-06-15 7:33 ` [PATCH v3 06/10] RISC-V: KVM: Implement device interface for AIA irqchip Anup Patel
2023-06-15 7:33 ` [PATCH v3 07/10] RISC-V: KVM: Add in-kernel emulation of AIA APLIC Anup Patel
2023-06-16 7:33 ` Atish Patra
2023-06-15 7:33 ` [PATCH v3 08/10] RISC-V: KVM: Expose APLIC registers as attributes of AIA irqchip Anup Patel
2023-06-16 7:34 ` Atish Patra [this message]
2023-06-15 7:33 ` [PATCH v3 09/10] RISC-V: KVM: Add in-kernel virtualization of AIA IMSIC Anup Patel
2023-06-15 7:33 ` [PATCH v3 10/10] RISC-V: KVM: Expose IMSIC registers as attributes of AIA irqchip Anup Patel
2023-06-18 16:02 ` [PATCH v3 00/10] RISC-V KVM in-kernel " Anup Patel
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