From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: "Atish Patra" <atish.patra@linux.dev>,
"Andrew Jones" <ajones@ventanamicro.com>
Cc: "Anup Patel" <anup@brainfault.org>,
"Will Deacon" <will@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Mayuresh Chitale" <mchitale@ventanamicro.com>,
<linux-riscv@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>,
<kvm-riscv@lists.infradead.org>,
"linux-riscv" <linux-riscv-bounces@lists.infradead.org>
Subject: Re: [PATCH v3 9/9] RISC-V: KVM: Upgrade the supported SBI version to 3.0
Date: Fri, 30 May 2025 13:09:43 +0200 [thread overview]
Message-ID: <DA9G60UI0ZLC.1KIWBXCTX0427@ventanamicro.com> (raw)
In-Reply-To: <2bac252c-883c-4f8a-9ae1-283660991520@linux.dev>
2025-05-29T11:44:38-07:00, Atish Patra <atish.patra@linux.dev>:
> On 5/29/25 3:24 AM, Radim Krčmář wrote:
>> I originally gave up on the idea, but I feel kinda bad for Drew now, so
>> trying again:
>
> I am sorry if some of my replies came across in the wrong way. That was
> never
> the intention.
I didn't mean to accuse you, my apologies. I agree with Drew's
positions, so to expand on a question that wasn't touched in his mail:
>> Even if userspace wants SBI for the M-mode interface, security minded
> This is probably a 3rd one ? Why we want M-mode interface in the user
> space ?
It is about turning KVM into an ISA accelerator.
A guest thinks it is running in S/HS-mode.
The ecall instruction traps to M-mode. RISC-V H extension doesn't
accelerate M-mode, so we have to emulate the trap in software.
The ISA doesn't say that M-mode means SBI. We try really hard to have
SBI on all RISC-V, but I think KVM is taking it a bit too far.
We can discuss how best to describe SBI, so userspace can choose to
accelerate the M-mode in KVM, but I think that the ability to emulate
M-mode in userspace should be provided.
--
kvm-riscv mailing list
kvm-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kvm-riscv
next prev parent reply other threads:[~2025-05-30 11:09 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-22 19:03 [PATCH v3 0/9] Add SBI v3.0 PMU enhancements Atish Patra
2025-05-22 19:03 ` [PATCH v3 1/9] drivers/perf: riscv: Add SBI v3.0 flag Atish Patra
2025-07-17 15:11 ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 2/9] drivers/perf: riscv: Add raw event v2 support Atish Patra
2025-07-17 15:17 ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 3/9] RISC-V: KVM: Add support for Raw event v2 Atish Patra
2025-07-17 15:18 ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 4/9] drivers/perf: riscv: Implement PMU event info function Atish Patra
2025-07-18 4:32 ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 5/9] drivers/perf: riscv: Export " Atish Patra
2025-07-18 4:39 ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 6/9] KVM: Add a helper function to validate vcpu gpa range Atish Patra
2025-07-17 16:04 ` Anup Patel
2025-07-17 16:07 ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 7/9] RISC-V: KVM: Use the new gpa range validate helper function Atish Patra
2025-07-18 4:40 ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 8/9] RISC-V: KVM: Implement get event info function Atish Patra
2025-07-18 5:44 ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 9/9] RISC-V: KVM: Upgrade the supported SBI version to 3.0 Atish Patra
2025-05-23 13:31 ` Radim Krčmář
2025-05-23 17:16 ` Atish Patra
2025-05-26 9:00 ` Radim Krčmář
2025-05-26 11:13 ` Andrew Jones
2025-05-28 14:16 ` Atish Patra
2025-05-28 15:09 ` Andrew Jones
2025-05-28 19:21 ` Atish Patra
2025-05-29 1:17 ` Atish Patra
2025-05-29 10:24 ` Radim Krčmář
2025-05-29 18:44 ` Atish Patra
2025-05-29 19:14 ` Andrew Jones
2025-05-30 11:45 ` Anup Patel
2025-05-30 11:09 ` Radim Krčmář [this message]
2025-05-30 19:29 ` Atish Patra
2025-06-03 11:40 ` Radim Krčmář
2025-06-04 0:29 ` Atish Patra
2025-07-18 4:44 ` Anup Patel
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