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From: Haibo Xu <haibo1.xu@intel.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH v2 4/8] KVM: riscv: selftests: Switch to use macro from csr.h
Date: Sat,  2 Sep 2023 20:59:26 +0800	[thread overview]
Message-ID: <ee4e518cbed9ff4210b74a22c5af21c410fab85d.1693659382.git.haibo1.xu@intel.com> (raw)
In-Reply-To: <cover.1693659382.git.haibo1.xu@intel.com>

Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
---
 tools/testing/selftests/kvm/include/riscv/processor.h | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/testing/selftests/kvm/include/riscv/processor.h
index 5b62a3d2aa9b..6810c887fadc 100644
--- a/tools/testing/selftests/kvm/include/riscv/processor.h
+++ b/tools/testing/selftests/kvm/include/riscv/processor.h
@@ -8,6 +8,7 @@
 #define SELFTEST_KVM_PROCESSOR_H
 
 #include "kvm_util.h"
+#include <asm/csr.h>
 #include <linux/stringify.h>
 
 static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t idx,
@@ -95,12 +96,8 @@ static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t idx,
 #define PGTBL_PAGE_SIZE				PGTBL_L0_BLOCK_SIZE
 #define PGTBL_PAGE_SIZE_SHIFT			PGTBL_L0_BLOCK_SHIFT
 
-#define SATP_PPN				_AC(0x00000FFFFFFFFFFF, UL)
 #define SATP_MODE_39				_AC(0x8000000000000000, UL)
 #define SATP_MODE_48				_AC(0x9000000000000000, UL)
-#define SATP_ASID_BITS				16
-#define SATP_ASID_SHIFT				44
-#define SATP_ASID_MASK				_AC(0xFFFF, UL)
 
 #define SBI_EXT_EXPERIMENTAL_START		0x08000000
 #define SBI_EXT_EXPERIMENTAL_END		0x08FFFFFF
-- 
2.34.1



  parent reply	other threads:[~2023-09-02 12:59 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-02 12:59 [PATCH v2 0/8] RISCV: Add kvm Sstc timer selftest Haibo Xu
2023-09-02 12:59 ` [PATCH v2 1/8] KVM: selftests: Unify the codes for guest exception handling Haibo Xu
2023-09-04 11:15   ` Andrew Jones
2023-09-06  2:15     ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 2/8] KVM: arm64: selftest: Split arch_timer test code Haibo Xu
2023-09-04 13:24   ` Andrew Jones
2023-09-06  2:14     ` Haibo Xu
2023-09-06  3:44       ` Haibo Xu
2023-09-06  7:01         ` Andrew Jones
2023-09-06  9:01           ` Haibo Xu
2023-09-06  6:41       ` Andrew Jones
2023-09-06  6:58         ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 3/8] tools: riscv: Add header file csr.h Haibo Xu
2023-09-04 13:26   ` Andrew Jones
2023-09-04 13:33   ` Andrew Jones
2023-09-06  6:35     ` Haibo Xu
2023-09-06  7:13       ` Andrew Jones
2023-09-06  9:09         ` Haibo Xu
2023-09-06 13:47           ` Andrew Jones
2023-09-02 12:59 ` Haibo Xu [this message]
2023-09-04 13:31   ` [PATCH v2 4/8] KVM: riscv: selftests: Switch to use macro from csr.h Andrew Jones
2023-09-06  6:56     ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 5/8] KVM: riscv: selftests: Add exception handling support Haibo Xu
2023-09-04 13:46   ` Andrew Jones
2023-09-02 12:59 ` [PATCH v2 6/8] KVM: riscv: selftests: Add guest helper to get vcpu id Haibo Xu
2023-09-04 13:48   ` Andrew Jones
2023-09-02 12:59 ` [PATCH v2 7/8] KVM: riscv: selftest: Change vcpu_has_ext to a common function Haibo Xu
2023-09-04 14:04   ` Andrew Jones
2023-09-06 10:10     ` Haibo Xu
2023-09-07  3:57       ` Haibo Xu
2023-09-07  9:01         ` Andrew Jones
2023-09-07  9:18           ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 8/8] KVM: riscv: selftests: Add sstc timer test Haibo Xu
2023-09-04 14:58   ` Andrew Jones
2023-09-07  4:20     ` Haibo Xu
2023-09-07 19:01       ` Andrew Jones
2023-09-08  1:19         ` Haibo Xu
2023-09-08  2:36           ` Haibo Xu
2023-09-05 10:36 ` [PATCH v2 0/8] RISCV: Add kvm Sstc timer selftest Andrew Jones
2023-09-06  1:23   ` Haibo Xu

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