Re: [PATCH v2 09/11] hw/ppc/spapr: Remove SpaprMachineClass::phb_placement callback

Chinmay Rath
2025-10-21T11:48:54Z

On 10/21/25 14:13, Philippe Mathieu-Daudé wrote:
> The SpaprMachineClass::phb_placement callback was only used by
> the pseries-4.0 machine, which got removed. Remove it as now
> unused, directly calling spapr_phb_placement().
> Move spapr_phb_placement() definition to avoid forward declaration.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
Reviewed-by: Chinmay Rath <rathc@linux.ibm.com>
> include/hw/ppc/spapr.h | 5 --
> hw/ppc/spapr.c | 114 ++++++++++++++++++++---------------------
> 2 files changed, 55 insertions(+), 64 deletions(-)
>
> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> index 58d31b096cd..bd783e92e15 100644
> --- a/include/hw/ppc/spapr.h
> +++ b/include/hw/ppc/spapr.h
> @@ -147,11 +147,6 @@ struct SpaprMachineClass {
> bool pre_5_1_assoc_refpoints;
> bool pre_5_2_numa_associativity;
> bool pre_6_2_numa_affinity;
> -
> - bool (*phb_placement)(SpaprMachineState *spapr, uint32_t index,
> - uint64_t *buid, hwaddr *pio,
> - hwaddr *mmio32, hwaddr *mmio64,
> - unsigned n_dma, uint32_t *liobns, Error **errp);
> SpaprResizeHpt resize_hpt_default;
> SpaprCapabilities default_caps;
> SpaprIrq *irq;
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index deab613e070..97736bba5a1 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -4068,12 +4068,62 @@ int spapr_phb_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr,
> return 0;
> }
>
> +static bool spapr_phb_placement(SpaprMachineState *spapr, uint32_t index,
> + uint64_t *buid, hwaddr *pio,
> + hwaddr *mmio32, hwaddr *mmio64,
> + unsigned n_dma, uint32_t *liobns, Error **errp)
> +{
> + /*
> + * New-style PHB window placement.
> + *
> + * Goals: Gives large (1TiB), naturally aligned 64-bit MMIO window
> + * for each PHB, in addition to 2GiB 32-bit MMIO and 64kiB PIO
> + * windows.
> + *
> + * Some guest kernels can't work with MMIO windows above 1<<46
> + * (64TiB), so we place up to 31 PHBs in the area 32TiB..64TiB
> + *
> + * 32TiB..(33TiB+1984kiB) contains the 64kiB PIO windows for each
> + * PHB stacked together. (32TiB+2GiB)..(32TiB+64GiB) contains the
> + * 2GiB 32-bit MMIO windows for each PHB. Then 33..64TiB has the
> + * 1TiB 64-bit MMIO windows for each PHB.
> + */
> + const uint64_t base_buid = 0x800000020000000ULL;
> + int i;
> +
> + /* Sanity check natural alignments */
> + QEMU_BUILD_BUG_ON((SPAPR_PCI_BASE % SPAPR_PCI_MEM64_WIN_SIZE) != 0);
> + QEMU_BUILD_BUG_ON((SPAPR_PCI_LIMIT % SPAPR_PCI_MEM64_WIN_SIZE) != 0);
> + QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM64_WIN_SIZE % SPAPR_PCI_MEM32_WIN_SIZE) != 0);
> + QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM32_WIN_SIZE % SPAPR_PCI_IO_WIN_SIZE) != 0);
> + /* Sanity check bounds */
> + QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_IO_WIN_SIZE) >
> + SPAPR_PCI_MEM32_WIN_SIZE);
> + QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_MEM32_WIN_SIZE) >
> + SPAPR_PCI_MEM64_WIN_SIZE);
> +
> + if (index >= SPAPR_MAX_PHBS) {
> + error_setg(errp, "\"index\" for PAPR PHB is too large (max %llu)",
> + SPAPR_MAX_PHBS - 1);
> + return false;
> + }
> +
> + *buid = base_buid + index;
> + for (i = 0; i < n_dma; ++i) {
> + liobns[i] = SPAPR_PCI_LIOBN(index, i);
> + }
> +
> + *pio = SPAPR_PCI_BASE + index * SPAPR_PCI_IO_WIN_SIZE;
> + *mmio32 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM32_WIN_SIZE;
> + *mmio64 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM64_WIN_SIZE;
> + return true;
> +}
> +
> static bool spapr_phb_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
> Error **errp)
> {
> SpaprMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
> SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(dev);
> - SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
> const unsigned windows_supported = spapr_phb_windows_supported(sphb);
> SpaprDrc *drc;
>
> @@ -4092,12 +4142,10 @@ static bool spapr_phb_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
> * This will check that sphb->index doesn't exceed the maximum number of
> * PHBs for the current machine type.
> */
> - return
> - smc->phb_placement(spapr, sphb->index,
> - &sphb->buid, &sphb->io_win_addr,
> - &sphb->mem_win_addr, &sphb->mem64_win_addr,
> - windows_supported, sphb->dma_liobn,
> - errp);
> + return spapr_phb_placement(spapr, sphb->index,
> + &sphb->buid, &sphb->io_win_addr,
> + &sphb->mem_win_addr, &sphb->mem64_win_addr,
> + windows_supported, sphb->dma_liobn, errp);
> }
>
> static void spapr_phb_plug(HotplugHandler *hotplug_dev, DeviceState *dev)
> @@ -4345,57 +4393,6 @@ static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *machine)
> return machine->possible_cpus;
> }
>
> -static bool spapr_phb_placement(SpaprMachineState *spapr, uint32_t index,
> - uint64_t *buid, hwaddr *pio,
> - hwaddr *mmio32, hwaddr *mmio64,
> - unsigned n_dma, uint32_t *liobns, Error **errp)
> -{
> - /*
> - * New-style PHB window placement.
> - *
> - * Goals: Gives large (1TiB), naturally aligned 64-bit MMIO window
> - * for each PHB, in addition to 2GiB 32-bit MMIO and 64kiB PIO
> - * windows.
> - *
> - * Some guest kernels can't work with MMIO windows above 1<<46
> - * (64TiB), so we place up to 31 PHBs in the area 32TiB..64TiB
> - *
> - * 32TiB..(33TiB+1984kiB) contains the 64kiB PIO windows for each
> - * PHB stacked together. (32TiB+2GiB)..(32TiB+64GiB) contains the
> - * 2GiB 32-bit MMIO windows for each PHB. Then 33..64TiB has the
> - * 1TiB 64-bit MMIO windows for each PHB.
> - */
> - const uint64_t base_buid = 0x800000020000000ULL;
> - int i;
> -
> - /* Sanity check natural alignments */
> - QEMU_BUILD_BUG_ON((SPAPR_PCI_BASE % SPAPR_PCI_MEM64_WIN_SIZE) != 0);
> - QEMU_BUILD_BUG_ON((SPAPR_PCI_LIMIT % SPAPR_PCI_MEM64_WIN_SIZE) != 0);
> - QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM64_WIN_SIZE % SPAPR_PCI_MEM32_WIN_SIZE) != 0);
> - QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM32_WIN_SIZE % SPAPR_PCI_IO_WIN_SIZE) != 0);
> - /* Sanity check bounds */
> - QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_IO_WIN_SIZE) >
> - SPAPR_PCI_MEM32_WIN_SIZE);
> - QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_MEM32_WIN_SIZE) >
> - SPAPR_PCI_MEM64_WIN_SIZE);
> -
> - if (index >= SPAPR_MAX_PHBS) {
> - error_setg(errp, "\"index\" for PAPR PHB is too large (max %llu)",
> - SPAPR_MAX_PHBS - 1);
> - return false;
> - }
> -
> - *buid = base_buid + index;
> - for (i = 0; i < n_dma; ++i) {
> - liobns[i] = SPAPR_PCI_LIOBN(index, i);
> - }
> -
> - *pio = SPAPR_PCI_BASE + index * SPAPR_PCI_IO_WIN_SIZE;
> - *mmio32 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM32_WIN_SIZE;
> - *mmio64 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM64_WIN_SIZE;
> - return true;
> -}
> -
> static ICSState *spapr_ics_get(XICSFabric *dev, int irq)
> {
> SpaprMachineState *spapr = SPAPR_MACHINE(dev);
> @@ -4606,7 +4603,6 @@ static void spapr_machine_class_init(ObjectClass *oc, const void *data)
> smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED;
> fwc->get_dev_path = spapr_get_fw_dev_path;
> nc->nmi_monitor_handler = spapr_nmi;
> - smc->phb_placement = spapr_phb_placement;
> vhc->cpu_in_nested = spapr_cpu_in_nested;
> vhc->deliver_hv_excp = spapr_exit_nested;
> vhc->hypercall = emulate_spapr_hypercall;