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From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: "Sean Christopherson" <seanjc@google.com>,
	"Andrew Jones" <andrew.jones@linux.dev>,
	"Janosch Frank" <frankja@linux.ibm.com>,
	"Claudio Imbrenda" <imbrenda@linux.ibm.com>,
	"Nico Böhr" <nrb@linux.ibm.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>
Cc: kvm-riscv@lists.infradead.org, linux-s390@vger.kernel.org,
	kvm@vger.kernel.org
Subject: Re: [kvm-unit-tests PATCH 01/16] lib: Add and use static_assert() convenience wrappers
Date: Tue, 10 Jun 2025 14:04:35 +0800	[thread overview]
Message-ID: <04c70eb3-4323-45b5-9a07-020d627c64a4@linux.intel.com> (raw)
In-Reply-To: <20250529221929.3807680-2-seanjc@google.com>


On 5/30/2025 6:19 AM, Sean Christopherson wrote:
> Add static_assert() to wrap _Static_assert() with stringification of the
> tested expression as the assert message.  In most cases, the failed
> expression is far more helpful than a human-generated message (usually
> because the developer is forced to add _something_ for the message).
>
> For API consistency, provide a double-underscore variant for specifying a
> custom message.
>
> Signed-off-by: Sean Christopherson <seanjc@google.com>
> ---
>  lib/riscv/asm/isa.h      | 4 +++-
>  lib/s390x/asm/arch_def.h | 6 ++++--
>  lib/s390x/fault.c        | 3 ++-
>  lib/util.h               | 3 +++
>  x86/lam.c                | 4 ++--
>  5 files changed, 14 insertions(+), 6 deletions(-)
>
> diff --git a/lib/riscv/asm/isa.h b/lib/riscv/asm/isa.h
> index df874173..fb3af67d 100644
> --- a/lib/riscv/asm/isa.h
> +++ b/lib/riscv/asm/isa.h
> @@ -1,7 +1,9 @@
>  /* SPDX-License-Identifier: GPL-2.0-only */
>  #ifndef _ASMRISCV_ISA_H_
>  #define _ASMRISCV_ISA_H_
> +
>  #include <bitops.h>
> +#include <util.h>
>  #include <asm/setup.h>
>  
>  /*
> @@ -14,7 +16,7 @@ enum {
>  	ISA_SSTC,
>  	ISA_MAX,
>  };
> -_Static_assert(ISA_MAX <= __riscv_xlen, "Need to increase thread_info.isa");
> +__static_assert(ISA_MAX <= __riscv_xlen, "Need to increase thread_info.isa");
>  
>  static inline bool cpu_has_extension(int cpu, int ext)
>  {
> diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h
> index 03adcd3c..4c11df74 100644
> --- a/lib/s390x/asm/arch_def.h
> +++ b/lib/s390x/asm/arch_def.h
> @@ -8,6 +8,8 @@
>  #ifndef _ASMS390X_ARCH_DEF_H_
>  #define _ASMS390X_ARCH_DEF_H_
>  
> +#include <util.h>
> +
>  struct stack_frame {
>  	struct stack_frame *back_chain;
>  	uint64_t reserved;
> @@ -62,7 +64,7 @@ struct psw {
>  	};
>  	uint64_t	addr;
>  };
> -_Static_assert(sizeof(struct psw) == 16, "PSW size");
> +static_assert(sizeof(struct psw) == 16);
>  
>  #define PSW(m, a) ((struct psw){ .mask = (m), .addr = (uint64_t)(a) })
>  
> @@ -194,7 +196,7 @@ struct lowcore {
>  	uint8_t		pad_0x1400[0x1800 - 0x1400];	/* 0x1400 */
>  	uint8_t		pgm_int_tdb[0x1900 - 0x1800];	/* 0x1800 */
>  } __attribute__ ((__packed__));
> -_Static_assert(sizeof(struct lowcore) == 0x1900, "Lowcore size");
> +static_assert(sizeof(struct lowcore) == 0x1900);
>  
>  extern struct lowcore lowcore;
>  
> diff --git a/lib/s390x/fault.c b/lib/s390x/fault.c
> index a882d5d9..ad5a5f66 100644
> --- a/lib/s390x/fault.c
> +++ b/lib/s390x/fault.c
> @@ -9,6 +9,7 @@
>   */
>  #include <libcflat.h>
>  #include <bitops.h>
> +#include <util.h>
>  #include <asm/arch_def.h>
>  #include <asm/page.h>
>  #include <fault.h>
> @@ -40,7 +41,7 @@ static void print_decode_pgm_prot(union teid teid)
>  			"LAP",
>  			"IEP",
>  		};
> -		_Static_assert(ARRAY_SIZE(prot_str) == PROT_NUM_CODES, "ESOP2 prot codes");
> +		static_assert(ARRAY_SIZE(prot_str) == PROT_NUM_CODES);
>  		int prot_code = teid_esop2_prot_code(teid);
>  
>  		printf("Type: %s\n", prot_str[prot_code]);
> diff --git a/lib/util.h b/lib/util.h
> index f86af6d3..00d0b47d 100644
> --- a/lib/util.h
> +++ b/lib/util.h
> @@ -8,6 +8,9 @@
>   * This work is licensed under the terms of the GNU LGPL, version 2.
>   */
>  
> +#define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, #expr)
> +#define __static_assert(expr, msg, ...) _Static_assert(expr, msg)
> +
>  /*
>   * parse_keyval extracts the integer from a string formatted as
>   * string=integer. This is useful for passing expected values to
> diff --git a/x86/lam.c b/x86/lam.c
> index a1c98949..ad91deaf 100644
> --- a/x86/lam.c
> +++ b/x86/lam.c
> @@ -13,6 +13,7 @@
>  #include "libcflat.h"
>  #include "processor.h"
>  #include "desc.h"
> +#include <util.h>
>  #include "vmalloc.h"
>  #include "alloc_page.h"
>  #include "vm.h"
> @@ -236,8 +237,7 @@ static void test_lam_user(void)
>  	 * address for both LAM48 and LAM57.
>  	 */
>  	vaddr = alloc_pages_flags(0, AREA_NORMAL);
> -	_Static_assert((AREA_NORMAL_PFN & GENMASK(63, 47)) == 0UL,
> -			"Identical mapping range check");
> +	static_assert((AREA_NORMAL_PFN & GENMASK(63, 47)) == 0UL);
>  
>  	/*
>  	 * Note, LAM doesn't have a global control bit to turn on/off LAM

Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>



  parent reply	other threads:[~2025-06-10  6:04 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-29 22:19 [kvm-unit-tests PATCH 00/16] x86: Add CPUID properties, clean up related code Sean Christopherson
2025-05-29 22:19 ` [kvm-unit-tests PATCH 01/16] lib: Add and use static_assert() convenience wrappers Sean Christopherson
2025-05-30  6:03   ` Andrew Jones
2025-05-30  9:01   ` Janosch Frank
2025-06-10  6:04   ` Mi, Dapeng [this message]
2025-05-29 22:19 ` [kvm-unit-tests PATCH 02/16] x86: Encode X86_FEATURE_* definitions using a structure Sean Christopherson
2025-06-10  6:08   ` Mi, Dapeng
2025-06-10 13:56     ` Sean Christopherson
2025-05-29 22:19 ` [kvm-unit-tests PATCH 03/16] x86: Add X86_PROPERTY_* framework to retrieve CPUID values Sean Christopherson
2025-06-10  6:14   ` Mi, Dapeng
2025-05-29 22:19 ` [kvm-unit-tests PATCH 04/16] x86: Use X86_PROPERTY_MAX_VIRT_ADDR in is_canonical() Sean Christopherson
2025-06-10  6:16   ` Mi, Dapeng
2025-05-29 22:19 ` [kvm-unit-tests PATCH 05/16] x86: Implement get_supported_xcr0() using X86_PROPERTY_SUPPORTED_XCR0_{LO,HI} Sean Christopherson
2025-06-10  6:18   ` Mi, Dapeng
2025-05-29 22:19 ` [kvm-unit-tests PATCH 06/16] x86: Add and use X86_PROPERTY_INTEL_PT_NR_RANGES Sean Christopherson
2025-06-10  6:21   ` Mi, Dapeng
2025-05-29 22:19 ` [kvm-unit-tests PATCH 07/16] x86/pmu: Rename pmu_gp_counter_is_available() to pmu_arch_event_is_available() Sean Christopherson
2025-06-10  7:09   ` Mi, Dapeng
2025-06-10 16:16     ` Sean Christopherson
2025-06-11  0:41       ` Mi, Dapeng
2025-05-29 22:19 ` [kvm-unit-tests PATCH 08/16] x86/pmu: Rename gp_counter_mask_length to arch_event_mask_length Sean Christopherson
2025-06-10  7:22   ` Mi, Dapeng
2025-05-29 22:19 ` [kvm-unit-tests PATCH 09/16] x86/pmu: Mark all arch events as available on AMD Sean Christopherson
2025-05-29 22:19 ` [kvm-unit-tests PATCH 10/16] x86/pmu: Use X86_PROPERTY_PMU_* macros to retrieve PMU information Sean Christopherson
2025-06-10  7:29   ` Mi, Dapeng
2025-05-29 22:19 ` [kvm-unit-tests PATCH 11/16] x86/sev: Use VC_VECTOR from processor.h Sean Christopherson
2025-06-10  7:25   ` Mi, Dapeng
2025-05-29 22:19 ` [kvm-unit-tests PATCH 12/16] x86/sev: Skip the AMD SEV test if SEV is unsupported/disabled Sean Christopherson
2025-05-29 22:19 ` [kvm-unit-tests PATCH 13/16] x86/sev: Define and use X86_FEATURE_* flags for CPUID 0x8000001F Sean Christopherson
2025-05-29 22:19 ` [kvm-unit-tests PATCH 14/16] x86/sev: Use X86_PROPERTY_SEV_C_BIT to get the AMD SEV C-bit location Sean Christopherson
2025-05-29 22:19 ` [kvm-unit-tests PATCH 15/16] x86/sev: Use amd_sev_es_enabled() to detect if SEV-ES is enabled Sean Christopherson
2025-05-30 16:22   ` Liam Merwick
2025-05-29 22:19 ` [kvm-unit-tests PATCH 16/16] x86: Move SEV MSR definitions to msr.h Sean Christopherson
2025-06-10 19:42 ` [kvm-unit-tests PATCH 00/16] x86: Add CPUID properties, clean up related code Sean Christopherson

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