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X-CSE-ConnectionGUID: nHHrNosPQZuDxneev0WKyQ== X-CSE-MsgGUID: sogNXx5nR46/vghckBN1Aw== X-IronPort-AV: E=McAfee;i="6800,10657,11531"; a="64091477" X-IronPort-AV: E=Sophos;i="6.17,312,1747724400"; d="scan'208";a="64091477" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2025 01:46:57 -0700 X-CSE-ConnectionGUID: CzUhbfpRRQOO0eUlar3fXQ== X-CSE-MsgGUID: 0zcksTDCRA+UDWtTtWu5tQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.18,268,1751266800"; d="scan'208";a="180130901" Received: from unknown (HELO [10.238.0.107]) ([10.238.0.107]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2025 01:46:54 -0700 Message-ID: <081acb09-43e4-4ed9-a12c-3b9c8f6da247@linux.intel.com> Date: Tue, 16 Sep 2025 16:46:51 +0800 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v15 11/41] KVM: x86: Report KVM supported CET MSRs as to-be-saved To: Sean Christopherson Cc: Paolo Bonzini , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Tom Lendacky , Mathias Krause , John Allen , Rick Edgecombe , Chao Gao , Maxim Levitsky , Xiaoyao Li , Zhang Yi Z References: <20250912232319.429659-1-seanjc@google.com> <20250912232319.429659-12-seanjc@google.com> Content-Language: en-US From: Binbin Wu In-Reply-To: <20250912232319.429659-12-seanjc@google.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 9/13/2025 7:22 AM, Sean Christopherson wrote: > From: Yang Weijiang > > Add CET MSRs to the list of MSRs reported to userspace if the feature, > i.e. IBT or SHSTK, associated with the MSRs is supported by KVM. > > Suggested-by: Chao Gao > Signed-off-by: Yang Weijiang > Tested-by: Mathias Krause > Tested-by: John Allen > Tested-by: Rick Edgecombe > Signed-off-by: Chao Gao > Signed-off-by: Sean Christopherson Reviewed-by: Binbin Wu > --- > arch/x86/kvm/x86.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 5653ddfe124e..2c9908bc8b32 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -344,6 +344,10 @@ static const u32 msrs_to_save_base[] = { > MSR_IA32_UMWAIT_CONTROL, > > MSR_IA32_XFD, MSR_IA32_XFD_ERR, MSR_IA32_XSS, > + > + MSR_IA32_U_CET, MSR_IA32_S_CET, > + MSR_IA32_PL0_SSP, MSR_IA32_PL1_SSP, MSR_IA32_PL2_SSP, > + MSR_IA32_PL3_SSP, MSR_IA32_INT_SSP_TAB, > }; > > static const u32 msrs_to_save_pmu[] = { > @@ -7598,6 +7602,20 @@ static void kvm_probe_msr_to_save(u32 msr_index) > if (!kvm_caps.supported_xss) > return; > break; > + case MSR_IA32_U_CET: > + case MSR_IA32_S_CET: > + if (!kvm_cpu_cap_has(X86_FEATURE_SHSTK) && > + !kvm_cpu_cap_has(X86_FEATURE_IBT)) > + return; > + break; > + case MSR_IA32_INT_SSP_TAB: > + if (!kvm_cpu_cap_has(X86_FEATURE_LM)) > + return; > + fallthrough; > + case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP: > + if (!kvm_cpu_cap_has(X86_FEATURE_SHSTK)) > + return; > + break; > default: > break; > }