From mboxrd@z Thu Jan 1 00:00:00 1970 From: Xiaoyao Li Subject: Re: [PATCH v4 15/17] kvm: x86: Report CORE_CAPABILITY on GET_SUPPORTED_CPUID Date: Mon, 04 Mar 2019 19:10:06 +0800 Message-ID: <08b44b2b7aede11a350f234768d5c17f8445984e.camel@linux.intel.com> References: <1551494711-213533-1-git-send-email-fenghua.yu@intel.com> <1551494711-213533-16-git-send-email-fenghua.yu@intel.com> <697ee0bd-a5f6-7712-017e-455eed5bc185@redhat.com> <79b659fb-1c16-463d-aa74-f1b3d8a9db5d@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Cc: linux-kernel , x86 , kvm@vger.kernel.org To: Paolo Bonzini , Fenghua Yu , Thomas Gleixner , Ingo Molnar , Borislav Petkov , H Peter Anvin , Dave Hansen , Ashok Raj , Peter Zijlstra , Ravi V Shankar Return-path: In-Reply-To: <79b659fb-1c16-463d-aa74-f1b3d8a9db5d@redhat.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On Mon, 2019-03-04 at 11:49 +0100, Paolo Bonzini wrote: > On 04/03/19 11:47, Xiaoyao Li wrote: > > On Mon, 2019-03-04 at 09:38 +0100, Paolo Bonzini wrote: > > > On 02/03/19 03:45, Fenghua Yu wrote: > > > > From: Xiaoyao Li > > > > > > > > In the latest Intel SDM, CPUID.(EAX=7H,ECX=0):EDX[30] will enumerate > > > > the presence of the IA32_CORE_CAPABILITY MSR. > > > > > > > > Update GET_SUPPORTED_CPUID to expose this feature bit to user space, so > > > > that user space know this bit can be enabled in CPUID. > > > > > > > > Signed-off-by: Xiaoyao Li > > > > --- > > > > arch/x86/kvm/cpuid.c | 3 ++- > > > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > > > > index c07958b59f50..e0e17b9c65da 100644 > > > > --- a/arch/x86/kvm/cpuid.c > > > > +++ b/arch/x86/kvm/cpuid.c > > > > @@ -410,7 +410,8 @@ static inline int __do_cpuid_ent(struct > > > > kvm_cpuid_entry2 > > > > *entry, u32 function, > > > > /* cpuid 7.0.edx*/ > > > > const u32 kvm_cpuid_7_0_edx_x86_features = > > > > F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | > > > > - F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | > > > > F(INTEL_STIBP); > > > > + F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | > > > > F(CORE_CAPABILITY) | > > > > + F(INTEL_STIBP); > > > > > > This should be enabled always if > > > boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT), > > > since the MSR is emulated. This way, guests can always rely on > > > IA32_CORE_CAPABILITY_MSR and it won't have to rely on the FMS > > > (which means nothing inside a guest). > > > > > > Paolo > > > > Hi, Paolo > > Do you mean that we don't need this here, but to add the handling below? > > > > static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 * entry, u32 > > function, > > ... > > switch (function) { > > ... > > case 7: { > > ... > > if (index ==0) { > > ... > > if(boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT)) > > entry->edx |= F(CORE_CAPABILITY); > > } > > ... > > ... > > } > > ... > > } > > Yes, exactly. > > Paolo Like you said before, I think we don't need the condition judgment "if(boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))", but to set F(CORE_CAPABILITY) always for guest since MSR_IA32_CORE_CAPABILITY is emulated. And we should set the right emulated value of MSR_IA32_CORE_CAPABILITY for guest in function kvm_get_core_capability() based on whether boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT) just as you commented in the next patch. Xiaoyao > > > > /* all calls to cpuid_count() should be made on the same cpu */ > > > > get_cpu(); > > > > > > > > > > > >