Re: [PATCH] KVM: x86/mmu: Fix a benign Bitwise vs. Logical OR mixup

[linmiaohe <linmiaohe@huawei.com>]

Hi：
>
>Use a Logical OR in __is_rsvd_bits_set() to combine the two reserved bit checks, which are obviously intended to be logical statements.  Switching to a Logical OR is functionally a nop, but allows the compiler to better optimize the checks.
>
>Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
>---
> arch/x86/kvm/mmu/mmu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 7269130ea5e2..72e845709027 100644
>--- a/arch/x86/kvm/mmu/mmu.c
>+++ b/arch/x86/kvm/mmu/mmu.c
>@@ -3970,7 +3970,7 @@ __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level)  {
> 	int bit7 = (pte >> 7) & 1, low6 = pte & 0x3f;
> 
>-	return (pte & rsvd_check->rsvd_bits_mask[bit7][level-1]) |
>+	return (pte & rsvd_check->rsvd_bits_mask[bit7][level-1]) ||
> 		((rsvd_check->bad_mt_xwr & (1ull << low6)) != 0);  }
> 
>--
>2.24.1

On the call chain walk_shadow_page_get_mmio_spte --> is_shadow_zero_bits_set --> __is_rsvd_bits_set, the
return value is used as:
	reserved |= is_shadow_zero_bits_set(vcpu->arch.mmu, spte,
		iterator.level);

But this seems ok because val reserved is bool type.

Thanks.