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Shutemov" References: <20260526023515.288829-1-rick.p.edgecombe@intel.com> <20260526023515.288829-11-rick.p.edgecombe@intel.com> Content-Language: en-US From: Binbin Wu In-Reply-To: <20260526023515.288829-11-rick.p.edgecombe@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 5/26/2026 10:35 AM, Rick Edgecombe wrote: > From: "Kirill A. Shutemov" > > The Physical Address Metadata Table (PAMT) holds TDX metadata for > physical memory and must be allocated by the kernel during TDX module > initialization. Dynamic PAMT is a TDX module feature that can reduce this > memory use by allocating part of the PAMT dynamically. > > All pieces are in place to Enable Dynamic PAMT if it is supported. > Determine if the TDX module supports it by checking the 'features0' bit > exposed by the TDX module. > > The TDX module also exposes information about whether the *system* (and > not the module) supports Dynamic PAMT. > > The TDX module documentation describes how PAMT works internally. To allow > the last level to be dynamically allocated, it uses a 3 level tree > structure, not unlike page tables. Like page tables, it has a maximum > address space that it can cover. This address space can be covered in 48 > bits. If the host physical address space is higher than this, than the ^ then > TDX module can't guarantee the tree will be able to cover the TDX memory. > > The TDX module exposes this system support via metadata stating the > minimum number of HKIDs that need to be available in order for Dynamic > PAMT to be usable. The reasoning appears to be that more HKIDs can shrink > the "real" addressable physical address bits enough to make the 48 bit > Dynamic PAMT limit workable on high physical address width HW. However, > the docs also clearly explain the 48 bit limit and how this fits into the > Dymamic PAMT tree constraints. ^ Dynamic > > The handy x86_phys_bits value is already read and adjusted for keyid bits. > So just compare that against 48 instead of reading more metadata and > burdening the code with the more tenuous connection to minimum HKID bits. > > Signed-off-by: Kirill A. Shutemov > Co-developed-by: Rick Edgecombe > Signed-off-by: Rick Edgecombe It looks like whether to check 48 bit physical address width limitation is still open. The rest LGTM.