From mboxrd@z Thu Jan 1 00:00:00 1970 From: Hollis Blanchard Subject: Re: PIO port width on various archs? Date: Sun, 25 Feb 2007 22:27:47 -0600 Message-ID: <1172464067.12245.4.camel@diesel> References: <45E14F9D.3050502@qumranet.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: kvm-devel , linux-kernel To: Avi Kivity Return-path: In-Reply-To: <45E14F9D.3050502-atKUWr5tajBWk0Htik3J/w@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Errors-To: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: kvm.vger.kernel.org On Sun, 2007-02-25 at 10:58 +0200, Avi Kivity wrote: > I'm changing the kvm userspace interface to be more friendly to other > archs. One issue is the PIO port size. x86 uses 16 bits to hold the > port size (64K ports). Is that an issue for other archs? > > I guess I could change it to __u32, but it's better to know what various > architectures actually require. PowerPC doesn't have any such concept; access to ISA PIO is done by having the bridge translate a particular range of MMIO accesses as PIO. I'm no expert, but I don't know of any mainstream processor other than x86 that supports PIO. -Hollis ------------------------------------------------------------------------- Take Surveys. Earn Cash. Influence the Future of IT Join SourceForge.net's Techsay panel and you'll get the chance to share your opinions on IT & business topics through brief surveys-and earn cash http://www.techsay.com/default.php?page=join.php&p=sourceforge&CID=DEVDEV