Re: [kvm-ppc-devel] [PATCH 1 of 3] Move x86 kvmcallback structure to kvmctl-x86.h header

[Hollis Blanchard <hollisb-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>]

On Sun, 2007-10-28 at 22:50 -0500, Anthony Liguori wrote:
> 
> You could certainly get even more clever and have the arch backend 
> register the appropriate tables based on the as type but that's merely
> an implementation detail.  The key observation, that I believe is
> correct, is that all architectures have one or more IO "address
> spaces" that have at max a 64-bit address space and support at max
> 64-bit input/output operations.  Once that assumption is made, almost
> all IO code becomes common.

Just FYI, some PowerPC have "load/store quad", which are 128-bit memory
accesses. For that matter, I suppose one could do IO loads into Altivec
registers (which are also 128 bits), though that sounds like an extreme
case. I wonder if the same is true for x86 vector registers.

Also, can't x86 "rep" instructions go beyond 64 bits? I guess that must
be handled in the arch-specific caller of io_write(), which would call
it multiple times.

-- 
Hollis Blanchard
IBM Linux Technology Center


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