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From: "Joerg Roedel" <joerg.roedel-5C7GfCeVMHo@public.gmane.org>
To: "Avi Kivity" <avi-atKUWr5tajBWk0Htik3J/w@public.gmane.org>
Cc: kvm-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org,
	Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>,
	Markus Rechberger
	<markus.rechberger-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH] SVM: support writing 0 to K8 performance counter control registers
Date: Tue, 11 Dec 2007 15:36:57 +0100	[thread overview]
Message-ID: <11973838173230-git-send-email-joerg.roedel@amd.com> (raw)

This patch is a slightly improved version of a previously submitted patch. It
lets SVM ignore writes of the value 0 to the performance counter control
registers.  Thus enabling them will still fail in the guest.  This is required
to boot Windows Vista 64bit.

Signed-off-by: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>
Signed-off-by: Markus Rechberger <markus.rechberger-5C7GfCeVMHo@public.gmane.org>
---
 drivers/kvm/svm.c |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/drivers/kvm/svm.c b/drivers/kvm/svm.c
index 9f8564a..f81b871 100644
--- a/drivers/kvm/svm.c
+++ b/drivers/kvm/svm.c
@@ -1155,6 +1155,17 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
 	case MSR_IA32_SYSENTER_ESP:
 		svm->vmcb->save.sysenter_esp = data;
 		break;
+	case MSR_K7_EVNTSEL0:
+	case MSR_K7_EVNTSEL1:
+	case MSR_K7_EVNTSEL2:
+	case MSR_K7_EVNTSEL3:
+		/*
+		 * only support writing 0 to the performance counters for now
+		 * to make Windows happy. Should be replaced by a real
+		 * performance counter emulation later.
+		 */
+		if (data == 0)
+			break;
 	default:
 		return kvm_set_msr_common(vcpu, ecx, data);
 	}
-- 
1.5.2.5




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             reply	other threads:[~2007-12-11 14:36 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-12-11 14:36 Joerg Roedel [this message]
     [not found] ` <11973838173230-git-send-email-joerg.roedel-5C7GfCeVMHo@public.gmane.org>
2007-12-11 14:47   ` [PATCH] SVM: support writing 0 to K8 performance counter control registers Avi Kivity
2007-12-11 14:51   ` Avi Kivity

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