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From: Paolo Bonzini <pbonzini@redhat.com>
To: Nadav Amit <nadav.amit@gmail.com>
Cc: LKML <linux-kernel@vger.kernel.org>, KVM <kvm@vger.kernel.org>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	"Yang Zhang" <yang.zhang.wz@gmail.com>,
	"feng wu" <feng.wu@intel.com>,
	mst@redhat.com
Subject: Re: [PATCH 1/5] KVM: x86: avoid atomic operations on APICv vmentry
Date: Sat, 15 Oct 2016 03:47:45 -0400 (EDT)	[thread overview]
Message-ID: <119879133.3749907.1476517665517.JavaMail.zimbra@redhat.com> (raw)
In-Reply-To: <9B7F4808-2294-426D-B463-CEB188CED2E0@gmail.com>


> > On Oct 14, 2016, at 11:56 AM, Paolo Bonzini <pbonzini@redhat.com> wrote:
> >>> 
> >>> 	for (i = 0; i <= 7; i++) {
> >>> -		pir_val = xchg(&pir[i], 0);
> >>> -		if (pir_val)
> >>> +		pir_val = READ_ONCE(pir[i]);
> >> 
> >> Out of curiosity, do you really need this READ_ONCE?
> > 
> > The answer can only be "depends on the compiler's whims". :)
> > If you think of READ_ONCE as a C11 relaxed atomic load, then yes.
> 
> Hm.. So the idea is to make the code "race-free” in the sense
> that every concurrent memory access is done using READ_ONCE/WRITE_ONCE?
> 
> If that is the case, I think there are many other cases that need to be
> changed, for example apic->irr_pending and vcpu->arch.pv.pv_unhalted.

There is no documentation for this in the kernel tree unfortunately.
But yes, I think we should do that.  Using READ_ONCE/WRITE_ONCE around
memory barriers is a start.

Paolo

  reply	other threads:[~2016-10-15  7:47 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-14 18:21 [PATCH 0/5] KVM: x86: cleanup and minimal speedup for APICv Paolo Bonzini
2016-10-14 18:21 ` [PATCH 1/5] KVM: x86: avoid atomic operations on APICv vmentry Paolo Bonzini
2016-10-14 18:50   ` Nadav Amit
2016-10-14 18:56     ` Paolo Bonzini
2016-10-14 19:44       ` Nadav Amit
2016-10-15  7:47         ` Paolo Bonzini [this message]
2016-10-16  2:29           ` Michael S. Tsirkin
2016-10-19 11:45             ` Paul E. McKenney
2016-10-26 21:50               ` Michael S. Tsirkin
2016-10-16  3:21   ` Michael S. Tsirkin
2016-10-17 11:07     ` Paolo Bonzini
2016-10-26 19:53   ` Radim Krčmář
2016-10-26 21:42     ` Michael S. Tsirkin
2016-10-27 16:44       ` Radim Krčmář
2016-10-27 16:51         ` Michael S. Tsirkin
2016-10-27 17:06           ` Radim Krčmář
2016-10-28  9:39             ` Paolo Bonzini
2016-10-28 22:04               ` Michael S. Tsirkin
2016-10-14 18:21 ` [PATCH 2/5] KVM: x86: do not scan IRR twice " Paolo Bonzini
2016-10-18  6:04   ` Wanpeng Li
2016-10-26 19:59   ` Radim Krčmář
2016-11-03 13:30     ` Paolo Bonzini
2016-11-03 13:53       ` Michael S. Tsirkin
2016-11-03 16:01         ` Paolo Bonzini
2016-11-03 15:03       ` Radim Krčmář
2016-11-03 16:00         ` Paolo Bonzini
2016-11-03 18:07           ` Radim Krčmář
2016-11-03 18:18             ` Paolo Bonzini
2016-11-03 18:29               ` Radim Krčmář
2016-11-03 20:16                 ` Radim Krčmář
2016-11-04  9:38                   ` Paolo Bonzini
2016-10-14 18:21 ` [PATCH 3/5] KVM: x86: do not use KVM_REQ_EVENT for APICv interrupt injection Paolo Bonzini
2016-10-26 20:05   ` Radim Krčmář
2016-10-14 18:21 ` [PATCH 4/5] KVM: x86: remove unnecessary sync_pir_to_irr Paolo Bonzini
2016-10-26 20:28   ` Radim Krčmář
2016-10-14 18:21 ` [PATCH 5/5] KVM: vmx: clear pending interrupts on KVM_SET_LAPIC Paolo Bonzini
2016-10-26 20:08   ` Radim Krčmář
2016-10-26 21:52 ` [PATCH 0/5] KVM: x86: cleanup and minimal speedup for APICv Michael S. Tsirkin

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