Re: [kvm-ppc-devel] [PATCH 4 of 7] Add PPC 440EP bamboo board device tree source & binary into qemu

[Hollis Blanchard <hollisb@us.ibm.com>]

On Tue, 2008-03-11 at 23:50 -0500, Jerone Young wrote:
> # HG changeset patch
> # User Jerone Young <jyoung5@us.ibm.com>
> # Date 1205296680 18000
> # Branch merge
> # Node ID 9c15709640cd55bf6f782d6856423363312493bb
> # Parent  48651677b7d05254d6acf03551bfea05cef8aa47
> Add PPC 440EP bamboo board device tree source & binary into qemu
> 
> This patch places the bamboo device tree for the PPC 440EP bamboo
> board into the pc-bios directory of the qemu source. This also adds a
> rule into the pc-bios/Makefile to build device tree files.
> 
> Signed-off-by: Jerone Young <jyoung5@us.ibm.com>
> 
> diff --git a/qemu/pc-bios/Makefile b/qemu/pc-bios/Makefile
> --- a/qemu/pc-bios/Makefile
> +++ b/qemu/pc-bios/Makefile
> @@ -12,6 +12,9 @@ all: $(TARGETS)
>  %.o: %.S
>  	$(CC) $(DEFINES) -c -o $@ $<
> 
> +%.dtb: %.dts 
> +	dtc -O dtb -I dts -o $@ $< 
> +
>  clean:
> -	rm -f $(TARGETS) *.o *~
> +	rm -f $(TARGETS) *.o *~ *.dtb
> 
> diff --git a/qemu/pc-bios/bamboo.dts b/qemu/pc-bios/bamboo.dts
> new file mode 100644
> --- /dev/null
> +++ b/qemu/pc-bios/bamboo.dts
> @@ -0,0 +1,310 @@
> +/*
> + * Device Tree Source for AMCC Bamboo
> + *
> + * Copyright (c) 2006, 2007 IBM Corp.
> + * Josh Boyer <jwboyer@linux.vnet.ibm.com>
> + *
> + * FIXME: Draft only!

Might as well remove this. In its place, add a little blurb explaining
how this file is used, and how qemu modifies the binary device tree at
runtime.

> + * This file is licensed under the terms of the GNU General Public
> + * License version 2.  This program is licensed "as is" without
> + * any warranty of any kind, whether express or implied.
> + */
> +
> +/ {
> +	#address-cells = <2>;
> +	#size-cells = <1>;
> +	model = "amcc,bamboo";
> +	compatible = "amcc,bamboo";
> +	dcr-parent = <&/cpus/cpu@0>;
> +
> +	aliases {
> +/*		ethernet0 = &EMAC0;  */
> +/*		ethernet1 = &EMAC1;  *
> +		serial0 = &UART0;
> + 		serial1 = &UART1;   
> +/*		serial2 = &UART2;    */
> +/*		serial3 = &UART3;    */
> +	};

Please just remove all the stuff you've commented out.

> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		cpu@0 {
> +			device_type = "cpu";
> +			model = "PowerPC,440EP";
> +			reg = <0>;
> +			clock-frequency = <1fca0550>; /* Filled in by zImage */
> +			timebase-frequency = <017d7840>; /* Filled in by zImage */
> +			i-cache-line-size = <20>;
> +			d-cache-line-size = <20>;
> +			i-cache-size = <8000>;
> +			d-cache-size = <8000>;
> +			dcr-controller;
> +			dcr-access-method = "native";
> +		};
> +	};
> +	memory {
> +		device_type = "memory";
> +		reg = <0 0 9000000>; /* Filled in by zImage */
> +	};

Also remove all references to "zImage".

> +	UIC0: interrupt-controller0 {
> +		compatible = "ibm,uic-440ep","ibm,uic";
> +		interrupt-controller;
> +		cell-index = <0>;
> +		dcr-reg = <0c0 009>;
> +		#address-cells = <0>;
> +		#size-cells = <0>;
> +		#interrupt-cells = <2>;
> +	};
> +/*
> +	UIC1: interrupt-controller1 {
> +		compatible = "ibm,uic-440ep","ibm,uic";
> +		interrupt-controller;
> +		cell-index = <1>;
> +		dcr-reg = <0d0 009>;
> +		#address-cells = <0>;
> +		#size-cells = <0>;
> +		#interrupt-cells = <2>;
> +		interrupts = <1e 4 1f 4>; 
> +		interrupt-parent = <&UIC0>;
> +	};
> +*/

Is it difficult to add UIC1 to our 440EP init code?

> +
> +		PCI0: pci@ec000000 {
> +			device_type = "pci";
> +			#interrupt-cells = <1>;
> +			#size-cells = <2>;
> +			#address-cells = <3>;
> +			compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
> +			primary;
> +			reg = <0 eec00000 8	/* Config space access */
> +			       0 eed00000 4	/* IACK */
> +			       0 eed00000 4	/* Special cycle */
> +			       0 ef400000 40>;	/* Internal registers */
> +
> +			/* Outbound ranges, one memory and one IO,
> +			 * later cannot be changed. Chip supports a second
> +			 * IO range but we don't use it for now
> +			 */
> +			ranges = <02000000 0 a0000000 0 a0000000 0 20000000
> +				  01000000 0 00000000 0 e8000000 0 00010000>;
> +
> +			/* Inbound 2GB range starting at 0 */
> +			dma-ranges = <42000000 0 0 0 0 0 80000000>;
> +
> +			/* Bamboo has all 4 IRQ pins tied together per slot */
> +			interrupt-map-mask = <f800 0 0 0>;
> +			interrupt-map = <
> +				/* IDSEL 1 */
> +				0800 0 0 0 &UIC0 1c 8
> +
> +				/* IDSEL 2 */
> +				1000 0 0 0 &UIC0 1b 8
> +
> +				/* IDSEL 3 */
> +				1800 0 0 0 &UIC0 1a 8
> +
> +				/* IDSEL 4 */
> +				2000 0 0 0 &UIC0 19 8
> +			>;
> +		};
> +	};

PCI0 is the only node you might want to leave commented out, since we
will have a patch for that in the near future.

However, since we haven't posted that patch yet, the PCI0 node shouldn't
be visible to the guest yet.

> +	chosen {
> +		linux,stdout-path = "/plb/opb/serial@ef600300";
> +		linux,initrd-start = <0>;
> +		linux,initrd-end = <0>;
> +		bootargs = "                ";
> +	};
> +};

Why is bootargs filled with spaces? Also, do the initrd properties need
to be present? I thought you figured out how to add them at runtime.

-- 
Hollis Blanchard
IBM Linux Technology Center


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