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X-CSE-ConnectionGUID: 4duIjTpjThypQscusGfrKw== X-CSE-MsgGUID: XkHccYbzTWyWUIIXKS6/3A== X-IronPort-AV: E=McAfee;i="6800,10657,11460"; a="51653641" X-IronPort-AV: E=Sophos;i="6.16,226,1744095600"; d="scan'208";a="51653641" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2025 19:29:42 -0700 X-CSE-ConnectionGUID: XrgJSVdPQjSsBITJp/bvbQ== X-CSE-MsgGUID: wGwzBnltSiKh2CB3Jj7PsA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,226,1744095600"; d="scan'208";a="152009217" Received: from dapengmi-mobl1.ccr.corp.intel.com (HELO [10.124.245.144]) ([10.124.245.144]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2025 19:29:39 -0700 Message-ID: <121aac04-45ff-48c6-bab9-d57bf3f8524a@linux.intel.com> Date: Wed, 11 Jun 2025 10:29:36 +0800 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 17/32] KVM: x86: Move definition of X2APIC_MSR() to lapic.h To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Chao Gao , Borislav Petkov , Xin Li , Francesco Lavra , Manali Shukla References: <20250610225737.156318-1-seanjc@google.com> <20250610225737.156318-18-seanjc@google.com> Content-Language: en-US From: "Mi, Dapeng" In-Reply-To: <20250610225737.156318-18-seanjc@google.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 6/11/2025 6:57 AM, Sean Christopherson wrote: > Dedup the definition of X2APIC_MSR and put it in the local APIC code > where it belongs. > > No functional change intended. > > Signed-off-by: Sean Christopherson > --- > arch/x86/kvm/lapic.h | 2 ++ > arch/x86/kvm/svm/svm.c | 2 -- > arch/x86/kvm/vmx/vmx.h | 2 -- > 3 files changed, 2 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h > index 4ce30db65828..4518b4e0552f 100644 > --- a/arch/x86/kvm/lapic.h > +++ b/arch/x86/kvm/lapic.h > @@ -21,6 +21,8 @@ > #define APIC_BROADCAST 0xFF > #define X2APIC_BROADCAST 0xFFFFFFFFul > > +#define X2APIC_MSR(r) (APIC_BASE_MSR + ((r) >> 4)) > + > enum lapic_mode { > LAPIC_MODE_DISABLED = 0, > LAPIC_MODE_INVALID = X2APIC_ENABLE, > diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c > index 4ee92e444dde..900a1303e0e7 100644 > --- a/arch/x86/kvm/svm/svm.c > +++ b/arch/x86/kvm/svm/svm.c > @@ -81,8 +81,6 @@ static uint64_t osvw_len = 4, osvw_status; > > static DEFINE_PER_CPU(u64, current_tsc_ratio); > > -#define X2APIC_MSR(x) (APIC_BASE_MSR + (x >> 4)) > - > static const u32 direct_access_msrs[] = { > MSR_STAR, > MSR_IA32_SYSENTER_CS, > diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h > index b5758c33c60f..0afe97e3478f 100644 > --- a/arch/x86/kvm/vmx/vmx.h > +++ b/arch/x86/kvm/vmx/vmx.h > @@ -19,8 +19,6 @@ > #include "../mmu.h" > #include "common.h" > > -#define X2APIC_MSR(r) (APIC_BASE_MSR + ((r) >> 4)) > - > #ifdef CONFIG_X86_64 > #define MAX_NR_USER_RETURN_MSRS 7 > #else Reviewed-by: Dapeng Mi