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From: Chris Lalancette <clalance@redhat.com>
To: kvm@vger.kernel.org
Cc: Chris Lalancette <clalance@redhat.com>
Subject: [PATCH v2 2/3] Allow any LAPIC to accept PIC interrupts.
Date: Mon, 14 Jun 2010 13:11:21 -0400	[thread overview]
Message-ID: <1276535482-11965-3-git-send-email-clalance@redhat.com> (raw)
In-Reply-To: <1276535482-11965-1-git-send-email-clalance@redhat.com>

If the guest wants to accept timer interrupts on a CPU other
than the BSP, we need to remove this gate.

Signed-off-by: Chris Lalancette <clalance@redhat.com>
---
 arch/x86/kvm/lapic.c |   12 +++++-------
 1 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index d8258a0..ee0f76c 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1107,13 +1107,11 @@ int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu)
 	u32 lvt0 = apic_get_reg(vcpu->arch.apic, APIC_LVT0);
 	int r = 0;
 
-	if (kvm_vcpu_is_bsp(vcpu)) {
-		if (!apic_hw_enabled(vcpu->arch.apic))
-			r = 1;
-		if ((lvt0 & APIC_LVT_MASKED) == 0 &&
-		    GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT)
-			r = 1;
-	}
+	if (!apic_hw_enabled(vcpu->arch.apic))
+		r = 1;
+	if ((lvt0 & APIC_LVT_MASKED) == 0 &&
+	    GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT)
+		r = 1;
 	return r;
 }
 
-- 
1.6.6.1


  parent reply	other threads:[~2010-06-14 17:13 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-06-14 17:11 [PATCH v2 0/3]: Fixes to IRQ routing Chris Lalancette
2010-06-14 17:11 ` [PATCH v2 1/3] Introduce a workqueue to deliver PIT timer interrupts Chris Lalancette
2010-06-14 22:19   ` Marcelo Tosatti
     [not found]     ` <20100615121144.GA2659@localhost.localdomain>
2010-06-15 17:53       ` Marcelo Tosatti
2010-06-15 13:06   ` Gleb Natapov
2010-06-14 17:11 ` Chris Lalancette [this message]
2010-06-14 17:11 ` [PATCH v2 3/3] In DM_LOWEST, only deliver interrupts to vcpus with enabled LAPIC's Chris Lalancette

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