From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andre Przywara Subject: [PATCH 7/8] kvm/svm: implement enhanced INVLPG intercept Date: Tue, 21 Dec 2010 11:12:06 +0100 Message-ID: <1292926327-19319-8-git-send-email-andre.przywara@amd.com> References: <1292926327-19319-1-git-send-email-andre.przywara@amd.com> Mime-Version: 1.0 Content-Type: text/plain Cc: , Andre Przywara To: , Return-path: Received: from db3ehsobe005.messaging.microsoft.com ([213.199.154.143]:14303 "EHLO DB3EHSOBE005.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933717Ab0LUKGc (ORCPT ); Tue, 21 Dec 2010 05:06:32 -0500 In-Reply-To: <1292926327-19319-1-git-send-email-andre.przywara@amd.com> Sender: kvm-owner@vger.kernel.org List-ID: When the DecodeAssist feature is available, the linear address is provided in the VMCB on INVLPG intercepts. Use it directly to avoid any decoding and emulation. This is only useful for shadow paging, though. Signed-off-by: Andre Przywara --- arch/x86/kvm/svm.c | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index eb662da..7871702 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -2652,7 +2652,12 @@ static int iret_interception(struct vcpu_svm *svm) static int invlpg_interception(struct vcpu_svm *svm) { - return emulate_instruction(&svm->vcpu, 0) == EMULATE_DONE; + if (!static_cpu_has(X86_FEATURE_DECODEASSISTS)) + return emulate_instruction(&svm->vcpu, 0) == EMULATE_DONE; + + kvm_mmu_invlpg(&svm->vcpu, svm->vmcb->control.exit_info_1); + skip_emulated_instruction(&svm->vcpu); + return 1; } static int emulate_on_interception(struct vcpu_svm *svm) -- 1.6.4