From: Alexander Graf <agraf@suse.de>
To: KVM list <kvm@vger.kernel.org>
Cc: kvm-ppc@vger.kernel.org, Scott Wood <scottwood@freescale.com>
Subject: [PATCH 06/15] KVM: PPC: booke: use shadow_msr
Date: Fri, 17 Jun 2011 16:49:43 +0200 [thread overview]
Message-ID: <1308322192-11918-7-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1308322192-11918-1-git-send-email-agraf@suse.de>
From: Scott Wood <scottwood@freescale.com>
Keep the guest MSR and the guest-mode true MSR separate, rather than
modifying the guest MSR on each guest entry to produce a true MSR.
Any bits which should be modified based on guest MSR must be explicitly
propagated from vcpu->arch.shared->msr to vcpu->arch.shadow_msr in
kvmppc_set_msr().
While we're modifying the guest entry code, reorder a few instructions
to bury some load latencies.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/include/asm/kvm_host.h | 2 +-
arch/powerpc/kernel/asm-offsets.c | 2 +-
arch/powerpc/kvm/booke.c | 1 +
arch/powerpc/kvm/booke_interrupts.S | 17 ++++++-----------
4 files changed, 9 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 186f150..12cb180 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -219,12 +219,12 @@ struct kvm_vcpu_arch {
#endif
#ifdef CONFIG_PPC_BOOK3S
- ulong shadow_msr;
ulong hflags;
ulong guest_owned_ext;
#endif
u32 vrsave; /* also USPRG0 */
u32 mmucr;
+ ulong shadow_msr;
ulong sprg4;
ulong sprg5;
ulong sprg6;
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 36e1c8a..25de8e4 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -404,12 +404,12 @@ int main(void)
DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
DEFINE(VCPU_SHARED, offsetof(struct kvm_vcpu, arch.shared));
DEFINE(VCPU_SHARED_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
+ DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
/* book3s */
#ifdef CONFIG_PPC_BOOK3S
DEFINE(VCPU_HOST_RETIP, offsetof(struct kvm_vcpu, arch.host_retip));
DEFINE(VCPU_HOST_MSR, offsetof(struct kvm_vcpu, arch.host_msr));
- DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
DEFINE(VCPU_TRAMPOLINE_LOWMEM, offsetof(struct kvm_vcpu, arch.trampoline_lowmem));
DEFINE(VCPU_TRAMPOLINE_ENTER, offsetof(struct kvm_vcpu, arch.trampoline_enter));
DEFINE(VCPU_HIGHMEM_HANDLER, offsetof(struct kvm_vcpu, arch.highmem_handler));
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 8462b3a..05cedb5 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -514,6 +514,7 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
vcpu->arch.pc = 0;
vcpu->arch.shared->msr = 0;
+ vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
vcpu->arch.shadow_pid = 1;
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S
index b58ccae..55410cc 100644
--- a/arch/powerpc/kvm/booke_interrupts.S
+++ b/arch/powerpc/kvm/booke_interrupts.S
@@ -24,8 +24,6 @@
#include <asm/page.h>
#include <asm/asm-offsets.h>
-#define KVMPPC_MSR_MASK (MSR_CE|MSR_EE|MSR_PR|MSR_DE|MSR_ME|MSR_IS|MSR_DS)
-
#define VCPU_GPR(n) (VCPU_GPRS + (n * 4))
/* The host stack layout: */
@@ -405,20 +403,17 @@ lightweight_exit:
/* Finish loading guest volatiles and jump to guest. */
lwz r3, VCPU_CTR(r4)
+ lwz r5, VCPU_CR(r4)
+ lwz r6, VCPU_PC(r4)
+ lwz r7, VCPU_SHADOW_MSR(r4)
mtctr r3
- lwz r3, VCPU_CR(r4)
- mtcr r3
+ mtcr r5
+ mtsrr0 r6
+ mtsrr1 r7
lwz r5, VCPU_GPR(r5)(r4)
lwz r6, VCPU_GPR(r6)(r4)
lwz r7, VCPU_GPR(r7)(r4)
lwz r8, VCPU_GPR(r8)(r4)
- lwz r3, VCPU_PC(r4)
- mtsrr0 r3
- lwz r3, VCPU_SHARED(r4)
- lwz r3, (VCPU_SHARED_MSR + 4)(r3)
- oris r3, r3, KVMPPC_MSR_MASK@h
- ori r3, r3, KVMPPC_MSR_MASK@l
- mtsrr1 r3
/* Clear any debug events which occurred since we disabled MSR[DE].
* XXX This gives us a 3-instruction window in which a breakpoint
--
1.6.0.2
next prev parent reply other threads:[~2011-06-17 14:49 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-17 14:49 [PULL 00/15] PPC KVM patch queue 2011-06-15 Alexander Graf
2011-06-17 14:49 ` [PATCH 01/15] KVM: PPC: fix partial application of "exit timing in ticks" Alexander Graf
2011-06-17 14:49 ` [PATCH 02/15] KVM: PPC: Resolve real-mode handlers through function exports Alexander Graf
2011-06-17 14:49 ` [PATCH 03/15] KVM: Add compat ioctl for KVM_SET_SIGNAL_MASK Alexander Graf
2011-06-19 9:04 ` Avi Kivity
2011-06-19 12:53 ` Alexander Graf
2011-06-19 13:01 ` Avi Kivity
2011-06-17 14:49 ` [PATCH 04/15] powerpc/e500: Save SPEFCSR in flush_spe_to_thread() Alexander Graf
2011-06-17 14:49 ` [PATCH 05/15] powerpc/e500: SPE register saving: take arbitrary struct offset Alexander Graf
2011-06-17 14:49 ` Alexander Graf [this message]
2011-06-17 14:49 ` [PATCH 07/15] KVM: PPC: e500: Save/restore SPE state Alexander Graf
2011-06-17 14:49 ` [PATCH 08/15] KVM: PPC: e500: Disable preloading TLB1 in tlb_load() Alexander Graf
2011-06-17 14:49 ` [PATCH 09/15] KVM: PPC: e500: don't use MAS0 as intermediate storage Alexander Graf
2011-06-17 14:49 ` [PATCH 10/15] KVM: PPC: e500: Eliminate shadow_pages[], and use pfns instead Alexander Graf
2011-06-17 14:49 ` [PATCH 11/15] KVM: PPC: e500: Support large page mappings of PFNMAP vmas Alexander Graf
2011-06-17 14:49 ` [PATCH 12/15] KVM: PPC: e500: enable magic page Alexander Graf
2011-06-17 14:49 ` [PATCH 13/15] KVM: PPC: e500: Stop keeping shadow TLB Alexander Graf
2011-06-17 14:49 ` [PATCH 14/15] KVM: PPC: e500: Add shadow PID support Alexander Graf
2011-06-17 14:49 ` [PATCH 15/15] KVM: PPC: e500: Don't search over the entire TLB0 Alexander Graf
2011-06-19 9:11 ` [PULL 00/15] PPC KVM patch queue 2011-06-15 Avi Kivity
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