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From: Alex Williamson <alex.williamson@redhat.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Richard Weinberger <richard@nod.at>,
	kvm@vger.kernel.org, avi@redhat.com,
	Marcelo Tosatti <mtosatti@redhat.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH 2/2] Device assignment: Fix MSI IRQ affinity setting
Date: Thu, 24 May 2012 16:05:58 -0600	[thread overview]
Message-ID: <1337897158.4714.51.camel@ul30vt> (raw)
In-Reply-To: <alpine.LFD.2.02.1205242323230.3231@ionos>

On Thu, 2012-05-24 at 23:39 +0200, Thomas Gleixner wrote:
> On Thu, 24 May 2012, Alex Williamson wrote:
> > On Thu, 2012-05-24 at 18:02 +0100, Richard Weinberger wrote:
> > > +            if (address == msi_start + PCI_MSI_DATA_32)
> > > +                handle_cfg_write_msi(pci_dev, assigned_dev);
> > 
> > Why didn't we just use range_covers_byte(address, len, pci_dev->msi_cap
> > + PCI_MSI_DATA_32) to start with?  But how does this handle the enable
> > bit?
> 
> The problem with the current implementation is that it only changes
> the routing if the msi entry goes from masked to unmasked state.

We don't expose a maskable MSI capability to the guest, so I think you
mean enable/disable.

> Linux does not mask the entries on affinity changes and never did,
> neither for MSI nor for MSI-X.
> 
> I know it's probably not according to the spec, but we can't fix that
> retroactively.

We need to do both then, enable MSI based on the enable bit and update
routing based on address updates.  It seems like this code is counting
on data being written after the enable bit is set, which is not
guaranteed to happen.  Thanks,

Alex


  parent reply	other threads:[~2012-05-24 22:06 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-05-24 17:02 [PATCH 1/2] Remove kvm_commit_irq_routes from error messages Richard Weinberger
2012-05-24 17:02 ` [PATCH 2/2] Device assignment: Fix MSI IRQ affinity setting Richard Weinberger
2012-05-24 18:20   ` Alex Williamson
     [not found]     ` <CAEMbtc+ycsC6u=CZ_Yg6C=WV=VqjA2uEDM5KWPM_7n3sZh_9Pw@mail.gmail.com>
2012-05-24 19:27       ` Richard Weinberger
2012-05-24 21:39     ` Thomas Gleixner
2012-05-24 21:53       ` Jan Kiszka
2012-05-24 22:11         ` Alex Williamson
2012-05-24 23:01           ` Thomas Gleixner
2012-05-24 23:23             ` Alex Williamson
2012-05-24 23:56               ` Thomas Gleixner
2012-05-25  2:37                 ` Jan Kiszka
2012-05-24 22:17         ` Michael S. Tsirkin
2012-05-24 23:06           ` Thomas Gleixner
2012-05-24 23:19             ` Thomas Gleixner
2012-05-24 22:05       ` Alex Williamson [this message]
2012-05-24 20:47   ` Jan Kiszka

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