From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex Williamson Subject: Re: [PATCH 2/2] Device assignment: Fix MSI IRQ affinity setting Date: Thu, 24 May 2012 16:05:58 -0600 Message-ID: <1337897158.4714.51.camel@ul30vt> References: <1337878924-39069-1-git-send-email-richard@nod.at> <1337878924-39069-2-git-send-email-richard@nod.at> <1337883627.4714.32.camel@ul30vt> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Cc: Richard Weinberger , kvm@vger.kernel.org, avi@redhat.com, Marcelo Tosatti , Bjorn Helgaas To: Thomas Gleixner Return-path: Received: from mx1.redhat.com ([209.132.183.28]:16507 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965125Ab2EXWGL (ORCPT ); Thu, 24 May 2012 18:06:11 -0400 In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: On Thu, 2012-05-24 at 23:39 +0200, Thomas Gleixner wrote: > On Thu, 24 May 2012, Alex Williamson wrote: > > On Thu, 2012-05-24 at 18:02 +0100, Richard Weinberger wrote: > > > + if (address == msi_start + PCI_MSI_DATA_32) > > > + handle_cfg_write_msi(pci_dev, assigned_dev); > > > > Why didn't we just use range_covers_byte(address, len, pci_dev->msi_cap > > + PCI_MSI_DATA_32) to start with? But how does this handle the enable > > bit? > > The problem with the current implementation is that it only changes > the routing if the msi entry goes from masked to unmasked state. We don't expose a maskable MSI capability to the guest, so I think you mean enable/disable. > Linux does not mask the entries on affinity changes and never did, > neither for MSI nor for MSI-X. > > I know it's probably not according to the spec, but we can't fix that > retroactively. We need to do both then, enable MSI based on the enable bit and update routing based on address updates. It seems like this code is counting on data being written after the enable bit is set, which is not guaranteed to happen. Thanks, Alex