From mboxrd@z Thu Jan 1 00:00:00 1970 From: Benjamin Herrenschmidt Subject: Re: [RFC PATCH] PCI: Introduce INTx check & mask API Date: Tue, 05 Jun 2012 11:39:42 +1000 Message-ID: <1338860382.7150.97.camel@pasglop> References: <4FBDE6D6.80700@ozlabs.ru> <4FBE2349.6040800@siemens.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org, Alexey Kardashevskiy , qemu-devel@nongnu.org, Alex Graf , Alex Williamson , David Gibson To: Jan Kiszka Return-path: In-Reply-To: <4FBE2349.6040800@siemens.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org List-Id: kvm.vger.kernel.org On Thu, 2012-05-24 at 09:02 -0300, Jan Kiszka wrote: > > Since PCI 2.3, this bit is mandatory, and it should be independent of > the masking bit. The question is, if your device is supposed to support > 2.3, thus is just buggy, It's a PCI Express device :-) > or if our detection algorithm is unreliable. It > basically builds on the assumption that, if we can flip the mask bit, > the feature should be present. I guess that is the best we can do. Maybe > we can augment this with a blacklist of devices that "support" flipping > without actually providing the feature. Cheers, Ben.