From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Subject: Re: [PATCH 2/3] KVM: PPC: Add SPR emulation exits Date: Mon, 8 Oct 2012 15:45:55 -0500 Message-ID: <1349729155.3721.6@snotra> References: <40230564-51D2-482B-A316-5C84D0C9DEF4@suse.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; delsp=Yes; format=Flowed Content-Transfer-Encoding: 8BIT Cc: Avi Kivity , , To: Alexander Graf Return-path: In-Reply-To: <40230564-51D2-482B-A316-5C84D0C9DEF4@suse.de> (from agraf@suse.de on Sun Oct 7 08:30:06 2012) Content-Disposition: inline Sender: kvm-ppc-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On 10/07/2012 08:30:06 AM, Alexander Graf wrote: > > On 07.10.2012, at 15:26, Avi Kivity wrote: > > > The downside of this generic approach is that it prepares suprises > down > > the road. The alternative approach, of adding a new KVM_EXIT_RESET, > > avoids this minefield, but requires ABI changes every time we want > to > > emulate something in userspace. Can you provide a critique of this > > alternate approach? > > Yeah, it doesn't scale as well. The SPR read/write give us all > information we need to emulate other registers too, like the magical > "read this SPR and automatically get the interrupt vector from the > MPIC and ack the interrupt along the way" register we have on e500. That's not actually how the register works in hardware (though it may be a reasonable way to emulate it with a userspace mpic). The interrupt is acknowledged when the core branches to the interrupt vector. The register itself is just storage that gets filled when that happens. -Scott