[PATCH v3 0/7] Streamline arithmetic instruction emulation

[Avi Kivity <avi.kivity@gmail.com>]

The current arithmetic instruction emulation is fairly clumsy: after
decode, each instruction gets a switch (size), and for every size
we fetch the operands, prepare flags, emulate the instruction, then store
back the flags and operands.

This patchset simplifies things by moving everything into common code
except the instruction itself.  All the pre- and post- processing is
coded just once.  The per-instrution code looks like:

  add %bl, %al
  ret

  add %bx, %ax
  ret

  add %ebx, %eax
  ret

  add %rbx, %rax
  ret

The savings in size, for the ten instructions converted in this patchset,
are fairly large:

   text	   data	    bss	    dec	    hex	filename
  63724	      0	      0	  63724	   f8ec	arch/x86/kvm/emulate.o.before
  61268	      0	      0	  61268	   ef54	arch/x86/kvm/emulate.o.after

- around 2500 bytes.

v3: fix reversed operand order in 2-operand macro

v2: rebased

Avi Kivity (7):
  KVM: x86 emulator: framework for streamlining arithmetic opcodes
  KVM: x86 emulator: Support for declaring single operand fastops
  KVM: x86 emulator: introduce NoWrite flag
  KVM: x86 emulator: mark CMP, CMPS, SCAS, TEST as NoWrite
  KVM: x86 emulator: convert NOT, NEG to fastop
  KVM: x86 emulator: add macros for defining 2-operand fastop emulation
  KVM: x86 emulator: convert basic ALU ops to fastop

 arch/x86/kvm/emulate.c | 215 +++++++++++++++++++++++++++----------------------
 1 file changed, 120 insertions(+), 95 deletions(-)

-- 
1.8.0.1