From: Scott Wood <scottwood@freescale.com>
To: Marcelo Tosatti <mtosatti@redhat.com>
Cc: Paul Mackerras <paulus@samba.org>, Alexander Graf <agraf@suse.de>,
<kvm@vger.kernel.org>, <kvm-ppc@vger.kernel.org>
Subject: Re: [PATCH 3/9] KVM: PPC: Book3S: Add kernel emulation for the XICS interrupt controller
Date: Wed, 20 Feb 2013 18:20:51 -0600 [thread overview]
Message-ID: <1361406051.31212.13@snotra> (raw)
In-Reply-To: <20130220195854.GA2029@amt.cnet> (from mtosatti@redhat.com on Wed Feb 20 13:58:54 2013)
On 02/20/2013 01:58:54 PM, Marcelo Tosatti wrote:
> This is probably a stupid question, but why the
> KVM_SET_IRQCHIP/KVM_SET_GSI_ROUTING interface is not appropriate for
> your purposes?
>
> x86 sets up a default GSI->IRQCHIP PIN mapping on creation (during
> KVM_SET_IRQCHIP), but it can be modified with KVM_SET_GSI_ROUTING.
To start, the whole IRQ routing stuff is poorly documented.
Am I supposed to make up GSI numbers and use the routing thing to
associate them with real interrupts? Are there constraints on what
sort of GSI numbers I can choose (I now see in the code that
KVM_MAX_IRQ_ROUTES is returned from the capability check, but where is
that documented? It looks like the APIC implementation has default
routes, where is that documented?)? Where does the code live to manage
this table, and how APICy is it (looks like the answer is "irq_comm.c,
and very")? I suppose I could write another implementation of the
table management code for MPIC, though the placement of "irqchip"
inside the route entry, rather than as an argument to KVM_IRQ_LINE,
suggests the table is supposed to be global, not in the individual
interrupt controller.
It looks like I'm going to have to do this anyway for irqfd, though
that doesn't make the other uses of the device control api go away.
Even KVM_DEV_MPIC_GRP_IRQ_ACTIVE would still be useful for reading the
status for debugging (reading device registers doesn't quite do it,
since the "active" bit won't show up if the interrupt is masked). At
that point, is it more offensive to make it read-only even though it
would be trivial to make it read/write (which would allow users who
don't need it to bypass the routing API), or to make it read/write and
live with there being more than one way to do something?
KVM_SET_IRQCHIP is not suitable because we have more than 512 bytes of
state, and because it doesn't allow debugging access to device
registers (e.g. inspecting from the QEMU command line), and because
it's hard to add new pieces of state if we realize we left something
out. It reminds be of GET/SET_SREGS. With that, I did what you seem
to want here, which is to adapt the existing interfaces, using feature
flags to control optional state. It ended up being a mess, and ONE_REG
was introduced as a replacement. The device control API is the
equivalent of ONE_REG for things other than vcpus.
-Scott
next prev parent reply other threads:[~2013-02-21 0:20 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-14 23:59 [PATCH 0/9] In-kernel XICS interrupt controller emulation Paul Mackerras
2013-02-14 23:59 ` [PATCH 1/9] KVM: PPC: Book3S: Add infrastructure to implement kernel-side RTAS calls Paul Mackerras
2013-03-21 8:52 ` Alexander Graf
2013-04-04 5:37 ` Paul Mackerras
2013-04-04 9:49 ` Alexander Graf
2013-04-04 22:38 ` Paul Mackerras
2013-04-19 15:16 ` Alexander Graf
2013-02-15 0:00 ` [PATCH 2/9] KVM: PPC: Remove unused argument to kvmppc_core_dequeue_external Paul Mackerras
2013-03-21 8:58 ` Alexander Graf
2013-02-15 0:01 ` [PATCH 3/9] KVM: PPC: Book3S: Add kernel emulation for the XICS interrupt controller Paul Mackerras
2013-02-15 20:05 ` Scott Wood
2013-02-15 23:18 ` Paul Mackerras
2013-02-15 23:59 ` Scott Wood
2013-02-16 2:56 ` Paul Mackerras
2013-02-16 3:57 ` Scott Wood
2013-02-16 4:51 ` Paul Mackerras
2013-02-18 22:43 ` Scott Wood
2013-02-20 0:41 ` Paul Mackerras
2013-02-20 1:01 ` Scott Wood
2013-02-20 19:58 ` Marcelo Tosatti
2013-02-21 0:20 ` Scott Wood [this message]
2013-02-21 1:09 ` Marcelo Tosatti
2013-02-21 1:45 ` Scott Wood
2013-02-24 14:08 ` Gleb Natapov
2013-02-25 0:59 ` Paul Mackerras
2013-03-21 9:20 ` Alexander Graf
2013-02-15 0:01 ` [PATCH 4/9] KVM: PPC: Book3S: Generalize interfaces to interrupt controller emulation Paul Mackerras
2013-02-15 0:02 ` [PATCH 5/9] KVM: PPC: Book3S: Facilities to save/restore XICS presentation ctrler state Paul Mackerras
2013-02-15 0:02 ` [PATCH 6/9] KVM: PPC: Book3S HV: Speed up wakeups of CPUs on HV KVM Paul Mackerras
2013-02-15 0:03 ` [PATCH 7/9] KVM: PPC: Book3S HV: Add support for real mode ICP in XICS emulation Paul Mackerras
2013-02-15 0:03 ` [PATCH 8/9] KVM: PPC: Book3S HV: Improve real-mode handling of external interrupts Paul Mackerras
2013-02-15 0:04 ` [PATCH 9/9] KVM: PPC: Book3S: Add support for ibm,int-on/off RTAS calls Paul Mackerras
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1361406051.31212.13@snotra \
--to=scottwood@freescale.com \
--cc=agraf@suse.de \
--cc=kvm-ppc@vger.kernel.org \
--cc=kvm@vger.kernel.org \
--cc=mtosatti@redhat.com \
--cc=paulus@samba.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).