From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Subject: Re: [RFC][KVM][PATCH 1/1] kvm:ppc:booke-64: soft-disable interrupts Date: Thu, 9 May 2013 16:27:36 -0500 Message-ID: <1368134856.654.11@snotra> References: <1368103062.25488.193.camel@pasglop> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="Flowed"; DelSp="Yes" Content-Transfer-Encoding: 7bit Cc: Wood Scott-B07421 , "kvm@vger.kernel.org" , Caraman Mihai Claudiu-B02008 , "agraf@suse.de" , "kvm-ppc@vger.kernel.org" , "tiejun.chen" , Bhushan Bharat-R65777 , "linuxppc-dev@lists.ozlabs.org" To: Benjamin Herrenschmidt Return-path: In-Reply-To: <1368103062.25488.193.camel@pasglop> (from benh@kernel.crashing.org on Thu May 9 07:37:42 2013) Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+glppe-linuxppc-embedded-2=m.gmane.org@lists.ozlabs.org Sender: "Linuxppc-dev" List-Id: kvm.vger.kernel.org On 05/09/2013 07:37:42 AM, Benjamin Herrenschmidt wrote: > On Thu, 2013-05-09 at 17:44 +0800, tiejun.chen wrote: > > > > Actually in the case GS=1 even if EE=0, EXT/DEC/DBELL still occur > as I > > recall. > > Only if directed to the hypervisor. This is always the case with KVM, right? At least on booke... > > > Case 1) > > > -> Local_irq_disable() will set soft_enabled = 0 > > > -> Now Externel interrupt happens, there we set PACA_IRQ_EE in > > irq_happened, Also clears EE in SRR1 and rfi. So interrupts are hard > > disabled. No more other interrupt gated by MSR.EE can happen. Looks > > like the idea here is to not let a device keep on inserting > interrupt > > till the interrupt condition on device is cleared, right? > > The external interrupt line is level sensitive normally, so we have to > mask MSR:EE in that case or the interrupt would keep re-occurring > (note > that FSL has this concept of auto-acked interrupts via the on die MPIC > for which you can potentially use PACA_IRQ_EE_EDGE instead and avoid > having to mask MSR:EE). Note that if we do this, we can no longer leave the interrupt vector in EPR, and would have to track (potentially multiple different) pending external interrupts in software. -Scott