From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Zyngier Subject: [PATCH v4 01/32] arm64: KVM: define HYP and Stage-2 translation page flags Date: Tue, 14 May 2013 15:13:29 +0100 Message-ID: <1368540840-26750-2-git-send-email-marc.zyngier@arm.com> References: <1368540840-26750-1-git-send-email-marc.zyngier@arm.com> Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Cc: catalin.marinas@arm.com, will.deacon@arm.com, pbonzini@redhat.com, gleb@redhat.com, Christopher Covington To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Return-path: Received: from service87.mimecast.com ([91.220.42.44]:48106 "EHLO service87.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754850Ab3ENOOW (ORCPT ); Tue, 14 May 2013 10:14:22 -0400 In-Reply-To: <1368540840-26750-1-git-send-email-marc.zyngier@arm.com> Sender: kvm-owner@vger.kernel.org List-ID: Add HYP and S2 page flags, for both normal and device memory. Reviewed-by: Christopher Covington Signed-off-by: Marc Zyngier --- arch/arm64/include/asm/memory.h | 5 +++++ arch/arm64/include/asm/pgtable-hwdef.h | 19 +++++++++++++++++++ arch/arm64/include/asm/pgtable.h | 11 +++++++++++ 3 files changed, 35 insertions(+) diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memor= y.h index 381f556..15745a7c 100644 --- a/arch/arm64/include/asm/memory.h +++ b/arch/arm64/include/asm/memory.h @@ -90,6 +90,11 @@ #define MT_NORMAL_NC=09=093 #define MT_NORMAL=09=094 =20 +/* + * Default memory type for Stage-2 translation + */ +#define MT_S2_NORMAL=09=090xf + #ifndef __ASSEMBLY__ =20 extern phys_addr_t=09=09memstart_addr; diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/as= m/pgtable-hwdef.h index 75fd13d..66367c6 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -35,6 +35,7 @@ /* * Section */ +#define PMD_SECT_USER=09=09(_AT(pteval_t, 1) << 6)=09=09/* AP[1] */ #define PMD_SECT_S=09=09(_AT(pmdval_t, 3) << 8) #define PMD_SECT_AF=09=09(_AT(pmdval_t, 1) << 10) #define PMD_SECT_NG=09=09(_AT(pmdval_t, 1) << 11) @@ -68,6 +69,24 @@ #define PTE_ATTRINDX_MASK=09(_AT(pteval_t, 7) << 2) =20 /* + * 2nd stage PTE definitions + */ +#define PTE_S2_RDONLY=09=09(_AT(pteval_t, 1) << 6) /* HAP[2:1] */ +#define PTE_S2_RDWR=09=09(_AT(pteval_t, 3) << 6) /* HAP[2:1] */ + +/* + * Memory Attribute override for Stage-2 (MemAttr[3:0]) + */ +#define PTE_S2_MEMATTR(t)=09(_AT(pteval_t, (t)) << 2) +#define PTE_S2_MEMATTR_MASK=09(_AT(pteval_t, 0xf) << 2) + +/* + * EL2/HYP PTE/PMD definitions + */ +#define PMD_HYP=09=09=09PMD_SECT_USER +#define PTE_HYP=09=09=09PTE_USER + +/* * 40-bit physical address supported. */ #define PHYS_MASK_SHIFT=09=09(40) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgta= ble.h index e333a24..34ba9ba 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -76,6 +76,11 @@ extern pgprot_t pgprot_default; #define PAGE_KERNEL=09=09_MOD_PROT(pgprot_default, PTE_PXN | PTE_UXN | PTE= _DIRTY) #define PAGE_KERNEL_EXEC=09_MOD_PROT(pgprot_default, PTE_UXN | PTE_DIRTY) =20 +#define PAGE_HYP=09=09_MOD_PROT(pgprot_default, PTE_HYP) +#define PAGE_HYP_DEVICE=09=09__pgprot(PROT_DEVICE_nGnRE | PTE_HYP) + +#define PAGE_S2=09=09=09__pgprot_modify(pgprot_default, PTE_S2_MEMATTR_MAS= K, PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY) + #define __PAGE_NONE=09=09__pgprot(((_PAGE_DEFAULT) & ~PTE_TYPE_MASK) | PTE= _PROT_NONE) #define __PAGE_SHARED=09=09__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PT= E_PXN | PTE_UXN) #define __PAGE_SHARED_EXEC=09__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | = PTE_PXN) @@ -197,6 +202,12 @@ extern pgprot_t phys_mem_access_prot(struct file *file= , unsigned long pfn, =20 #define pmd_bad(pmd)=09=09(!(pmd_val(pmd) & 2)) =20 +#define pmd_table(pmd)=09=09((pmd_val(pmd) & PMD_TYPE_MASK) =3D=3D \ +=09=09=09=09 PMD_TYPE_TABLE) +#define pmd_sect(pmd)=09=09((pmd_val(pmd) & PMD_TYPE_MASK) =3D=3D \ +=09=09=09=09 PMD_TYPE_SECT) + + static inline void set_pmd(pmd_t *pmdp, pmd_t pmd) { =09*pmdp =3D pmd; --=20 1.8.2.3