From: Scott Wood <scottwood@freescale.com>
To: Mihai Caraman <mihai.caraman@freescale.com>
Cc: <linuxppc-dev@lists.ozlabs.org>, <kvm-ppc@vger.kernel.org>,
<kvm@vger.kernel.org>,
Mihai Caraman <mihai.caraman@freescale.com>
Subject: Re: [PATCH 1/2] powerpc/booke64: Add LRAT error exception handler
Date: Wed, 3 Jul 2013 15:18:12 -0500 [thread overview]
Message-ID: <1372882692.8183.150@snotra> (raw)
In-Reply-To: <1372870566-11299-1-git-send-email-mihai.caraman@freescale.com> (from mihai.caraman@freescale.com on Wed Jul 3 11:56:05 2013)
On 07/03/2013 11:56:05 AM, Mihai Caraman wrote:
> @@ -1410,6 +1423,7 @@ _GLOBAL(setup_doorbell_ivors)
> _GLOBAL(setup_ehv_ivors)
> SET_IVOR(40, 0x300) /* Embedded Hypervisor System Call */
> SET_IVOR(41, 0x320) /* Embedded Hypervisor Privilege */
> + SET_IVOR(42, 0x340) /* LRAT Error */
What happens if we write to IVOR42 on e5500? If the answer is no-op,
is that behavior guaranteed on any CPU with E.HV but not LRAT?
-Scott
next prev parent reply other threads:[~2013-07-03 20:18 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-03 16:56 [PATCH 1/2] powerpc/booke64: Add LRAT error exception handler Mihai Caraman
2013-07-03 16:56 ` [PATCH 2/2] KVM: PPC: Book3E: " Mihai Caraman
2013-07-03 20:16 ` Scott Wood
2013-07-03 21:42 ` Alexander Graf
2013-07-03 21:52 ` Scott Wood
2013-07-04 6:47 ` Caraman Mihai Claudiu-B02008
2013-07-04 6:57 ` Benjamin Herrenschmidt
2013-07-03 20:18 ` Scott Wood [this message]
2013-07-04 6:34 ` [PATCH 1/2] powerpc/booke64: " Caraman Mihai Claudiu-B02008
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